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| author | Tristan Gingold <tgingold@free.fr> | 2019-07-17 06:34:15 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-07-17 06:34:15 +0200 |
| commit | 3ad0b11d266aa7d5c594f76722fb7fa67ec039de (patch) | |
| tree | 746e1b4a09bff0a235c2665540363c8e0f9a87fb /src/synth/synth-decls.adb | |
| parent | 3a1f9c3fa9ef0224c4add88cd6020d8a933426ee (diff) | |
| download | ghdl-3ad0b11d266aa7d5c594f76722fb7fa67ec039de.tar.gz ghdl-3ad0b11d266aa7d5c594f76722fb7fa67ec039de.tar.bz2 ghdl-3ad0b11d266aa7d5c594f76722fb7fa67ec039de.zip | |
synth: make type Wire_Id_Record private.
Diffstat (limited to 'src/synth/synth-decls.adb')
| -rw-r--r-- | src/synth/synth-decls.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-decls.adb b/src/synth/synth-decls.adb index 4866b112b..e512b948a 100644 --- a/src/synth/synth-decls.adb +++ b/src/synth/synth-decls.adb @@ -55,7 +55,7 @@ package body Synth.Decls is else Value := Build_Signal (Build_Context, Name, W); end if; - Wire_Id_Table.Table (Val.W).Gate := Value; + Set_Wire_Gate (Val.W, Value); when others => raise Internal_Error; end case; |