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* synth: handle instantiation within generate statement.Tristan Gingold2019-07-151-0/+2
* ghdlsynth: quit early in case of error.Tristan Gingold2019-07-151-1/+10
* synth: handle choices by range in aggregates.Tristan Gingold2019-07-153-12/+33
* synth: handle anonymous subtypes in array subtypes.Tristan Gingold2019-07-151-4/+10
* synth: add comments.Tristan Gingold2019-07-151-6/+10
* synth: remove extra elaboration of port types.Tristan Gingold2019-07-151-18/+2
* synth: apply block configuration to for-generate statements.Tristan Gingold2019-07-151-2/+15
* synth: use correct instance to synth default expressions of assocs.Tristan Gingold2019-07-151-10/+13
* synth: save and restore instance_pool for processes.Tristan Gingold2019-07-151-2/+4
* synth: improve support of components (anon subtypes).Tristan Gingold2019-07-141-0/+15
* ghdlsynth: check top entity can be a top entity.Tristan Gingold2019-07-145-23/+41
* vhdl: refactoring: remove configure function with string access.Tristan Gingold2019-07-148-105/+95
* vhdl: set location on reference to the anonymous signal declaration.Tristan Gingold2019-07-141-0/+1
* ghdlsynth: automatically find top entity if not specified.Tristan Gingold2019-07-141-8/+33
* vhdl: fixes in find_top_entity (handle for-generate, remove early return)Tristan Gingold2019-07-142-5/+27
* synth: handle anonymous signals.Tristan Gingold2019-07-141-0/+3
* Add a test for previous commit.Tristan Gingold2019-07-131-0/+3
* synth: handle black boxes.Tristan Gingold2019-07-133-47/+108
* Add a test for component instances.Tristan Gingold2019-07-132-3/+14
* synth: handle simple component instances.Tristan Gingold2019-07-131-36/+256
* vhdl: cleanup in clear_instantiation_configuration.Tristan Gingold2019-07-134-70/+23
* simul-elaboration: rewrite assertion.Tristan Gingold2019-07-131-3/+3
* add TCE to ->Who uses GHDL (#868)TopiLeppanen2019-07-122-2/+12
* vhdl-configuration: improve error message.Tristan Gingold2019-07-111-1/+1
* vhdl: minor reformating.Tristan Gingold2019-07-112-8/+5
* synth: set flag_elaborate.Tristan Gingold2019-07-112-1/+3
* vhdl-sem_lib: save and restore nbr_errors inTristan Gingold2019-07-111-0/+10
* libghdl: import Free_Dependence_List.Tristan Gingold2019-07-113-0/+6
* vhdl-nodes: add commentsTristan Gingold2019-07-111-0/+16
* synth_top_entity: pass config + minor cleanup.Tristan Gingold2019-07-113-13/+7
* synth-insts: minor cleanup.Tristan Gingold2019-07-111-7/+0
* synth: do not crash on use of std_logic_1164 2008.Tristan Gingold2019-07-102-12/+10
* synth: add synth_top_entity.Tristan Gingold2019-07-103-221/+96
* synth: add a simple test for instantiation.Tristan Gingold2019-07-105-0/+105
* synth: add Id_Port gate to improve display.Tristan Gingold2019-07-105-29/+73
* synth: display instances in reverse order.Tristan Gingold2019-07-102-10/+41
* synth: handle instantiation (WIP)Tristan Gingold2019-07-1011-48/+587
* vhdl: improve an error message.Tristan Gingold2019-07-101-1/+1
* Add synth testsuite to CI (#862)1138-4EB2019-07-105-34/+71
* vhdl-sem_lib: Load_Parse_Design_Unit: ignore checksum ifTristan Gingold2019-07-091-3/+6
* vhdl-sem_lib: free_dependencies: only free entity aspect.Tristan Gingold2019-07-091-3/+19
* libghdl: automatically set the prefix from shared libraryTristan Gingold2019-07-094-13/+26
* fix: *gcc* build and run docker images are now named *gcc (#865)1138-4EB2019-07-091-9/+18
* doc: update list of supported LLVM versions (#863)1138-4EB2019-07-092-8/+2
* Add a test for ghdl/ghdl-language-server#7Tristan Gingold2019-07-093-2/+10
* ghdllocal: correctly disp GHDL_PREFIX in --disp-config.Tristan Gingold2019-07-093-8/+8
* Add testcase for #864Tristan Gingold2019-07-093-0/+90
* vhdl: report an error in case of missing binding indication in config spec.Tristan Gingold2019-07-091-11/+21
* python: add errorout_console, disp_config.Tristan Gingold2019-07-082-0/+6
* Fix a merge collision.Tristan Gingold2019-07-081-154/+84