diff options
author | Tristan Gingold <tgingold@free.fr> | 2019-07-10 18:57:37 +0200 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2019-07-10 19:06:06 +0200 |
commit | fef6c5f6fbec086f9b2a4bd73ccbcb346742ca0d (patch) | |
tree | df22da0ad581351798e1b09679464c2b29812b52 | |
parent | 52536adeb52c88676bbf4141fed7189ace6047c5 (diff) | |
download | ghdl-fef6c5f6fbec086f9b2a4bd73ccbcb346742ca0d.tar.gz ghdl-fef6c5f6fbec086f9b2a4bd73ccbcb346742ca0d.tar.bz2 ghdl-fef6c5f6fbec086f9b2a4bd73ccbcb346742ca0d.zip |
synth: display instances in reverse order.
-rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 33 | ||||
-rw-r--r-- | src/synth/netlists.adb | 18 |
2 files changed, 41 insertions, 10 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index d3ef8b728..72003c04f 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -708,11 +708,34 @@ package body Netlists.Disp_Vhdl is procedure Disp_Vhdl (M : Module; Is_Top : Boolean) is begin - for S of Sub_Modules (M) loop - if Get_Id (S) >= Id_User_None then - Disp_Vhdl (S, False); - end if; - end loop; + -- Disp in reverse order. + declare + Num : Natural; + begin + Num := 0; + for S of Sub_Modules (M) loop + if Get_Id (S) >= Id_User_None then + Num := Num + 1; + end if; + end loop; + + declare + type Module_Array is array (1 .. Num) of Module; + Modules : Module_Array; + begin + Num := 0; + for S of Sub_Modules (M) loop + if Get_Id (S) >= Id_User_None then + Num := Num + 1; + Modules (Num) := S; + end if; + end loop; + + for I in reverse Modules'Range loop + Disp_Vhdl (Modules (I), False); + end loop; + end; + end; if not Is_Top then Disp_Entity (M); diff --git a/src/synth/netlists.adb b/src/synth/netlists.adb index 6e84e2116..ef05a7021 100644 --- a/src/synth/netlists.adb +++ b/src/synth/netlists.adb @@ -341,9 +341,6 @@ package body Netlists is First_Output => Outputs)); Res := Instances_Table.Last; - -- Link instance - Append_Instance (Parent, Res); - -- Setup inputs. if Nbr_Inputs > 0 then for I in 0 .. Nbr_Inputs - 1 loop @@ -380,10 +377,16 @@ package body Netlists is Nbr_Inputs : constant Port_Nbr := Get_Nbr_Inputs (M); Nbr_Outputs : constant Port_Nbr := Get_Nbr_Outputs (M); Nbr_Params : constant Param_Nbr := Get_Nbr_Params (M); + Res : Instance; begin - return New_Instance_Internal + Res := New_Instance_Internal (Parent, M, Name, Nbr_Inputs, Nbr_Outputs, Nbr_Params, Get_Output_First_Desc (M)); + + -- Link instance + Append_Instance (Parent, Res); + + return Res; end New_Instance; function Create_Self_Instance (M : Module) return Instance @@ -392,11 +395,16 @@ package body Netlists is pragma Assert (Get_Self_Instance (M) = No_Instance); Nbr_Inputs : constant Port_Nbr := Get_Nbr_Inputs (M); Nbr_Outputs : constant Port_Nbr := Get_Nbr_Outputs (M); + Res : Instance; begin -- Swap inputs and outputs; no parameters. - return New_Instance_Internal + Res := New_Instance_Internal (M, M, Get_Name (M), Nbr_Outputs, Nbr_Inputs, 0, Get_Input_First_Desc (M)); + + Append_Instance (M, Res); + + return Res; end Create_Self_Instance; function Is_Valid (I : Instance) return Boolean is |