| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | vhdl: cleanup in clear_instantiation_configuration. | Tristan Gingold | 2019-07-13 | 4 | -70/+23 |
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| * | simul-elaboration: rewrite assertion. | Tristan Gingold | 2019-07-13 | 1 | -3/+3 |
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| * | add TCE to ->Who uses GHDL (#868) | TopiLeppanen | 2019-07-12 | 2 | -2/+12 |
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| * | vhdl-configuration: improve error message. | Tristan Gingold | 2019-07-11 | 1 | -1/+1 |
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| * | vhdl: minor reformating. | Tristan Gingold | 2019-07-11 | 2 | -8/+5 |
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| * | synth: set flag_elaborate. | Tristan Gingold | 2019-07-11 | 2 | -1/+3 |
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| * | vhdl-sem_lib: save and restore nbr_errors in | Tristan Gingold | 2019-07-11 | 1 | -0/+10 |
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| * | libghdl: import Free_Dependence_List. | Tristan Gingold | 2019-07-11 | 3 | -0/+6 |
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| * | vhdl-nodes: add comments | Tristan Gingold | 2019-07-11 | 1 | -0/+16 |
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| * | synth_top_entity: pass config + minor cleanup. | Tristan Gingold | 2019-07-11 | 3 | -13/+7 |
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| * | synth-insts: minor cleanup. | Tristan Gingold | 2019-07-11 | 1 | -7/+0 |
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| * | synth: do not crash on use of std_logic_1164 2008. | Tristan Gingold | 2019-07-10 | 2 | -12/+10 |
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| * | synth: add synth_top_entity. | Tristan Gingold | 2019-07-10 | 3 | -221/+96 |
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| * | synth: add a simple test for instantiation. | Tristan Gingold | 2019-07-10 | 5 | -0/+105 |
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| * | synth: add Id_Port gate to improve display. | Tristan Gingold | 2019-07-10 | 5 | -29/+73 |
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| * | synth: display instances in reverse order. | Tristan Gingold | 2019-07-10 | 2 | -10/+41 |
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| * | synth: handle instantiation (WIP) | Tristan Gingold | 2019-07-10 | 11 | -48/+587 |
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| * | vhdl: improve an error message. | Tristan Gingold | 2019-07-10 | 1 | -1/+1 |
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| * | Add synth testsuite to CI (#862) | 1138-4EB | 2019-07-10 | 5 | -34/+71 |
| | | | | | | | | | | | | | * add synth testsuite to CI * update travis jobs to fedora29 * travis: add 'dummy' image name to man job * travis: update Debian from Stretch to Buster * update travis jobs to fedora30 | ||||
| * | vhdl-sem_lib: Load_Parse_Design_Unit: ignore checksum if | Tristan Gingold | 2019-07-09 | 1 | -3/+6 |
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| * | vhdl-sem_lib: free_dependencies: only free entity aspect. | Tristan Gingold | 2019-07-09 | 1 | -3/+19 |
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| * | libghdl: automatically set the prefix from shared library | Tristan Gingold | 2019-07-09 | 4 | -13/+26 |
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| * | fix: *gcc* build and run docker images are now named *gcc (#865) | 1138-4EB | 2019-07-09 | 1 | -9/+18 |
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| * | doc: update list of supported LLVM versions (#863) | 1138-4EB | 2019-07-09 | 2 | -8/+2 |
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| * | Add a test for ghdl/ghdl-language-server#7 | Tristan Gingold | 2019-07-09 | 3 | -2/+10 |
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| * | ghdllocal: correctly disp GHDL_PREFIX in --disp-config. | Tristan Gingold | 2019-07-09 | 3 | -8/+8 |
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| * | Add testcase for #864 | Tristan Gingold | 2019-07-09 | 3 | -0/+90 |
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| * | vhdl: report an error in case of missing binding indication in config spec. | Tristan Gingold | 2019-07-09 | 1 | -11/+21 |
| | | | | | Fix #864 | ||||
| * | python: add errorout_console, disp_config. | Tristan Gingold | 2019-07-08 | 2 | -0/+6 |
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| * | Fix a merge collision. | Tristan Gingold | 2019-07-08 | 1 | -154/+84 |
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| * | synthesis: add Node instead of Iir. | Tristan Gingold | 2019-07-08 | 1 | -10/+10 |
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| * | vhdl simul-elaboration: minor rewrite. | Tristan Gingold | 2019-07-08 | 1 | -3/+1 |
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| * | synth-environement: add comments. | Tristan Gingold | 2019-07-08 | 2 | -3/+5 |
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| * | Add testcase for #860 | Tristan Gingold | 2019-07-08 | 2 | -0/+68 |
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| * | add info about the structure of the project (#861) | 1138-4EB | 2019-07-07 | 3 | -16/+59 |
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| * | synth: handle simple user function calls. | Tristan Gingold | 2019-07-06 | 6 | -18/+89 |
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| * | synth: support top-level generics. | Tristan Gingold | 2019-07-06 | 2 | -0/+23 |
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| * | configure: add --enable-synth (off by default). | Tristan Gingold | 2019-07-06 | 6 | -7/+44 |
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| * | ghdlsynth.h: follow convention, add comments. | Tristan Gingold | 2019-07-04 | 1 | -13/+16 |
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| * | vhdl-annotations: partial revert of previous patch for | Tristan Gingold | 2019-07-04 | 2 | -1/+12 |
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| * | synth: use future states for PSL restrict directive. | Tristan Gingold | 2019-07-04 | 1 | -5/+8 |
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| * | synth: handle some "/=". | Tristan Gingold | 2019-07-04 | 2 | -0/+23 |
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| * | libghdlsynth: catch all exceptions. | Tristan Gingold | 2019-07-04 | 1 | -0/+3 |
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| * | vhdl/translate: reindent. | Tristan Gingold | 2019-07-04 | 1 | -1/+1 |
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| * | synth: handle PSL restrict directive (WIP). | Tristan Gingold | 2019-07-04 | 2 | -1/+111 |
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| * | synth: add concat_array function. | Tristan Gingold | 2019-07-04 | 2 | -36/+52 |
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| * | netlists-disp_vhdl: display initial value of idff. | Tristan Gingold | 2019-07-04 | 1 | -19/+32 |
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| * | netlists: export new_internal_name. | Tristan Gingold | 2019-07-04 | 1 | -4/+10 |
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| * | netlists: allow to build idff without a connected D. | Tristan Gingold | 2019-07-04 | 2 | -3/+6 |
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| * | netlists: add reduce_or/reduce_and gates. | Tristan Gingold | 2019-07-04 | 4 | -0/+36 |
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index : iCE40/ghdl | |
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