aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* vhdl-parse: handle inside commentsTristan Gingold2022-11-213-1/+32
|
* vhdl-prints: add an option to display commentsTristan Gingold2022-11-203-3/+74
|
* testsuite/pyunit: add Comments.py testTristan Gingold2022-11-203-0/+93
|
* pyGHDL: add file_comments.pyTristan Gingold2022-11-207-3/+140
|
* Add an API to gather comments.Tristan Gingold2022-11-207-4/+380
|
* grt-algos: clarify the APITristan Gingold2022-11-203-6/+11
|
* testsuite/gna: add a test for #2244Tristan Gingold2022-11-162-2/+2
|
* vhdl-evaluation(build_array_choices_vector): handle vhdl-08 aggregates.Tristan Gingold2022-11-163-47/+61
| | | | For #2244
* testsuite/gna: add a test and close #1486Tristan Gingold2022-11-162-0/+48
|
* testsuite/gna: add tests for #2244Tristan Gingold2022-11-165-0/+180
|
* vhdl-sem_expr: fix aggregate index for vhdl-08Tristan Gingold2022-11-161-13/+42
| | | | | When the index direction is determined by the direction of range choices. Fix #2244
* testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#179Tristan Gingold2022-11-154-0/+120
|
* synth: improve error message for ghdl/ghdl-yosys-plugin#179Tristan Gingold2022-11-151-1/+3
|
* testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#180Tristan Gingold2022-11-143-0/+191
|
* synth: avoid a crash on signal assignment in non-sensitized process.Tristan Gingold2022-11-141-2/+9
| | | | Fix ghdl/ghdl-yosys-plugin#180
* Remove trailing spacesTristan Gingold2022-11-082-2/+2
|
* testsuite/synth: add a test for #2240Tristan Gingold2022-11-082-0/+41
|
* elab-vhdl_expr: fix a crash on simple aggregates. Fix #2240Tristan Gingold2022-11-082-15/+13
|
* vhdl: fix some compiler warningsTristan Gingold2022-11-083-6/+2
|
* testsuite/gna: add a test for #2239Tristan Gingold2022-11-082-0/+34
|
* vhdl-sem_expr: fix a crash after error. Fix #2239Tristan Gingold2022-11-081-0/+2
|
* Added id to warnings related to attributes. (#2242)cderrien2022-11-085-2/+25
|
* Escape port name in dot output. (#2241)cderrien2022-11-081-1/+1
|
* testsuite/gna: add a test for previous commitTristan Gingold2022-11-072-0/+52
|
* vhdl/translate: handle predefined operators as conversion functionsTristan Gingold2022-11-073-44/+73
|
* netlists-memories: refactoringTristan Gingold2022-11-061-113/+105
|
* netlists-memories: factorize code.Tristan Gingold2022-11-061-83/+41
|
* netlists: factorize codeTristan Gingold2022-11-061-100/+56
|
* synth-environment.adb: fix warningTristan Gingold2022-11-051-1/+0
|
* testsuite/mem02: add more tests for RAM inference.Tristan Gingold2022-11-0513-1/+544
|
* testsuite/synth: add a test for #2232Tristan Gingold2022-11-052-0/+37
|
* synth: rework memory inference. Fix #2232Tristan Gingold2022-11-053-78/+233
|
* netlists-builders: allow building mem_wr_sync without clk and en.Tristan Gingold2022-11-051-4/+10
|
* synth: infere a dff (instead of an idff) when the init value is XTristan Gingold2022-11-032-6/+21
|
* testsuite/synth/issue2035: avoid warningsTristan Gingold2022-11-021-0/+2
|
* testsuite/gna: add a test for #2238Tristan Gingold2022-11-022-0/+27
|
* vhdl-sem_expr(sem_qualified_expression): relax staticness rules.Tristan Gingold2022-11-021-1/+11
| | | | Fix #2238
* testsuite/synth: add tests for #2237Tristan Gingold2022-11-029-0/+746
|
* synth: handle bit/unsigned and bit/signed vhdl 08 operators.Tristan Gingold2022-11-021-12/+36
| | | | Fix #2237
* Add missing -g for generic override to CLI help for RUNOPTS (#2220)svnesbo2022-11-011-0/+1
| | | Co-authored-by: Simon Voigt Nesbo <Simon.Voigt.Nesbo@hvl.no>
* testsuite/synth: add a test for #2231Tristan Gingold2022-10-303-0/+90
|
* netlists-inference: handle flip-flop with different patterns.Tristan Gingold2022-10-301-23/+75
| | | | Fix #2231
* netlists-gates: add a commentTristan Gingold2022-10-301-0/+1
|
* testsuite/gna: add tests for #2233Tristan Gingold2022-10-295-0/+137
|
* vhdl-sem_names(sem_name_free): handle iir_kind_slice_name. For #2233Tristan Gingold2022-10-291-0/+1
|
* vhdl-evaluation: handle to_string_digits. For #2233Tristan Gingold2022-10-291-5/+50
|
* synth: internal refactoringTristan Gingold2022-10-294-121/+93
| | | | use memtyp for eval_static_predefined_function_call
* elab-vhdl_types: abstract elab_floating_type_definitionTristan Gingold2022-10-291-10/+15
|
* testsuite/synth: add a test for #2234Tristan Gingold2022-10-294-0/+775
|
* synth: fix crash in disp_verilog. Fix #2234Tristan Gingold2022-10-291-3/+8
|
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-16 15:35:24 +0000