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authorTristan Gingold <tgingold@free.fr>2022-11-16 21:27:00 +0100
committerTristan Gingold <tgingold@free.fr>2022-11-16 21:27:00 +0100
commitbad897e392427190d2774269925e2bb21cf50a93 (patch)
tree7947ad458c6780a766a326fdb97e307248a063e5
parent07341e64512b33d8541bcf8b2a8c9f3c66da832f (diff)
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testsuite/gna: add a test for #2244
-rw-r--r--testsuite/gna/issue2244/repro1.vhdl1
-rwxr-xr-xtestsuite/gna/issue2244/testsuite.sh3
2 files changed, 2 insertions, 2 deletions
diff --git a/testsuite/gna/issue2244/repro1.vhdl b/testsuite/gna/issue2244/repro1.vhdl
index 212068679..02b27b713 100644
--- a/testsuite/gna/issue2244/repro1.vhdl
+++ b/testsuite/gna/issue2244/repro1.vhdl
@@ -49,5 +49,6 @@ begin
begin
wait for 3 ns;
assert s_resulting_vector = s_expected_vector severity failure;
+ wait;
end process;
end rtl;
diff --git a/testsuite/gna/issue2244/testsuite.sh b/testsuite/gna/issue2244/testsuite.sh
index 22b2b5bae..07052561f 100755
--- a/testsuite/gna/issue2244/testsuite.sh
+++ b/testsuite/gna/issue2244/testsuite.sh
@@ -4,8 +4,7 @@
export GHDL_STD_FLAGS=--std=08
-# TODO: repro1
-for f in mve repro2 repro3; do
+for f in mve repro1 repro2 repro3; do
analyze $f.vhdl
elab_simulate $f
done