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| author | Tristan Gingold <tgingold@free.fr> | 2021-11-12 18:51:46 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-11-12 18:52:58 +0100 |
| commit | c2b6b4fe03c879753c76f5bee9f0ffe3b0e73f52 (patch) | |
| tree | 4ecb1000d2bc6bee27d4d3f43769af0a983e8deb /testsuite/synth | |
| parent | b5a0a2bbd7110f105f7d8370b7d8773ec4a463ab (diff) | |
| download | ghdl-c2b6b4fe03c879753c76f5bee9f0ffe3b0e73f52.tar.gz ghdl-c2b6b4fe03c879753c76f5bee9f0ffe3b0e73f52.tar.bz2 ghdl-c2b6b4fe03c879753c76f5bee9f0ffe3b0e73f52.zip | |
testsuite/synth: adjust test after previous commit
Diffstat (limited to 'testsuite/synth')
| -rw-r--r-- | testsuite/synth/issue1164/comp.vhdl | 8 | ||||
| -rwxr-xr-x | testsuite/synth/issue1164/testsuite.sh | 3 | ||||
| -rw-r--r-- | testsuite/synth/issue958/c.vhdl | 9 | ||||
| -rwxr-xr-x | testsuite/synth/issue958/testsuite.sh | 2 |
4 files changed, 20 insertions, 2 deletions
diff --git a/testsuite/synth/issue1164/comp.vhdl b/testsuite/synth/issue1164/comp.vhdl new file mode 100644 index 000000000..676b960a2 --- /dev/null +++ b/testsuite/synth/issue1164/comp.vhdl @@ -0,0 +1,8 @@ +library IEEE; +use IEEE.std_logic_1164.all; + +entity comp is + port ( + data : in std_logic_vector + ); +end comp; diff --git a/testsuite/synth/issue1164/testsuite.sh b/testsuite/synth/issue1164/testsuite.sh index 2be3b2f1a..bf7cf9409 100755 --- a/testsuite/synth/issue1164/testsuite.sh +++ b/testsuite/synth/issue1164/testsuite.sh @@ -2,7 +2,8 @@ . ../../testenv.sh -synth_analyze bug +synth bug.vhdl -e > syn_bug.vhdl +analyze comp.vhdl syn_bug.vhdl clean diff --git a/testsuite/synth/issue958/c.vhdl b/testsuite/synth/issue958/c.vhdl new file mode 100644 index 000000000..354a7d1c7 --- /dev/null +++ b/testsuite/synth/issue958/c.vhdl @@ -0,0 +1,9 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity c is + port ( + p : in std_logic_vector(7 downto 0) + ); +end c; + diff --git a/testsuite/synth/issue958/testsuite.sh b/testsuite/synth/issue958/testsuite.sh index 02e38f330..d5fc69a24 100755 --- a/testsuite/synth/issue958/testsuite.sh +++ b/testsuite/synth/issue958/testsuite.sh @@ -4,7 +4,7 @@ for f in ent ent1; do synth $f.vhdl -e $f > syn_$f.vhdl - analyze syn_$f.vhdl + analyze c.vhdl syn_$f.vhdl clean done |