aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl
diff options
context:
space:
mode:
authorTristan Gingold <tgingold@free.fr>2019-05-05 07:31:00 +0200
committerTristan Gingold <tgingold@free.fr>2019-05-05 08:05:11 +0200
commitc8ec958606e57b5149eada285bfa0b00bf68098a (patch)
treedd32be9427ddeccb057839bce2824a5894913b17 /src/vhdl
parent53fcf00d88d1a3b34c7833aa4c421ea52f3e03dd (diff)
downloadghdl-c8ec958606e57b5149eada285bfa0b00bf68098a.tar.gz
ghdl-c8ec958606e57b5149eada285bfa0b00bf68098a.tar.bz2
ghdl-c8ec958606e57b5149eada285bfa0b00bf68098a.zip
vhdl: move configuration package as a vhdl child.
Diffstat (limited to 'src/vhdl')
-rw-r--r--src/vhdl/translate/ortho_front.adb10
-rw-r--r--src/vhdl/translate/trans-chap12.adb6
-rw-r--r--src/vhdl/translate/trans-rtis.adb4
-rw-r--r--src/vhdl/vhdl-configuration.adb (renamed from src/vhdl/configuration.adb)4
-rw-r--r--src/vhdl/vhdl-configuration.ads (renamed from src/vhdl/configuration.ads)4
5 files changed, 14 insertions, 14 deletions
diff --git a/src/vhdl/translate/ortho_front.adb b/src/vhdl/translate/ortho_front.adb
index 3fc6f4e81..6db015494 100644
--- a/src/vhdl/translate/ortho_front.adb
+++ b/src/vhdl/translate/ortho_front.adb
@@ -27,7 +27,7 @@ with Libraries;
with Iirs_Utils; use Iirs_Utils;
with Std_Package;
with Flags;
-with Configuration;
+with Vhdl.Configuration;
with Translation;
with Vhdl.Sem;
with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
@@ -324,7 +324,7 @@ package body Ortho_Front is
-- Gather dependencies
pragma Assert (Flags.Flag_Elaborate = False);
- Configuration.Flag_Load_All_Design_Units := False;
+ Vhdl.Configuration.Flag_Load_All_Design_Units := False;
-- Exclude std.standard
Set_Configuration_Mark_Flag (Std_Package.Std_Standard_Unit, True);
@@ -450,7 +450,7 @@ package body Ortho_Front is
is
use Interfaces.C_Streams;
use System;
- use Configuration;
+ use Vhdl.Configuration;
use Name_Table;
Nul : constant Character := Character'Val (0);
@@ -550,7 +550,7 @@ package body Ortho_Front is
Trans_Be.Sem_Foreign_Hook := Sem_Foreign_Hook'Access;
Shlib_Interning.Init;
- Config := Configuration.Configure
+ Config := Vhdl.Configuration.Configure
(Elab_Entity.all, Elab_Architecture.all);
if Errorout.Nbr_Errors > 0 then
-- This may happen (bad entity for example).
@@ -604,7 +604,7 @@ package body Ortho_Front is
Flags.Flag_Elaborate := True;
Flags.Flag_Only_Elab_Warnings := False;
- Config := Configuration.Configure
+ Config := Vhdl.Configuration.Configure
(Elab_Entity.all, Elab_Architecture.all);
Translation.Elaborate (Config, True);
diff --git a/src/vhdl/translate/trans-chap12.adb b/src/vhdl/translate/trans-chap12.adb
index 1659d54fb..00e071010 100644
--- a/src/vhdl/translate/trans-chap12.adb
+++ b/src/vhdl/translate/trans-chap12.adb
@@ -16,7 +16,7 @@
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
-with Configuration;
+with Vhdl.Configuration;
with Errorout; use Errorout;
with Std_Package; use Std_Package;
with Iirs_Utils; use Iirs_Utils;
@@ -419,7 +419,7 @@ package body Trans.Chap12 is
-- Write to file FILELIST all the files that are needed to link the design.
procedure Gen_Stubs
is
- use Configuration;
+ use Vhdl.Configuration;
-- Add all dependences of UNIT.
-- UNIT is not used, but added during link.
@@ -527,7 +527,7 @@ package body Trans.Chap12 is
procedure Elaborate (Config : Iir_Design_Unit; Whole : Boolean)
is
- use Configuration;
+ use Vhdl.Configuration;
Unit : Iir_Design_Unit;
Lib_Unit : Iir;
diff --git a/src/vhdl/translate/trans-rtis.adb b/src/vhdl/translate/trans-rtis.adb
index 7a1baf407..b0997006d 100644
--- a/src/vhdl/translate/trans-rtis.adb
+++ b/src/vhdl/translate/trans-rtis.adb
@@ -20,7 +20,7 @@ with Name_Table;
with Files_Map;
with Errorout; use Errorout;
with Iirs_Utils; use Iirs_Utils;
-with Configuration;
+with Vhdl.Configuration;
with Libraries;
with Trans.Chap7;
with Trans; use Trans.Helpers;
@@ -2926,7 +2926,7 @@ package body Trans.Rtis is
procedure Generate_Top (Nbr_Pkgs : out Natural)
is
- use Configuration;
+ use Vhdl.Configuration;
Unit : Iir_Design_Unit;
Lib : Iir_Library_Declaration;
diff --git a/src/vhdl/configuration.adb b/src/vhdl/vhdl-configuration.adb
index d047da43d..8d06a3a73 100644
--- a/src/vhdl/configuration.adb
+++ b/src/vhdl/vhdl-configuration.adb
@@ -27,7 +27,7 @@ with Vhdl.Sem_Scopes;
with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
with Vhdl.Canon;
-package body Configuration is
+package body Vhdl.Configuration is
procedure Add_Design_Concurrent_Stmts (Parent : Iir);
procedure Add_Design_Block_Configuration (Blk : Iir_Block_Configuration);
procedure Add_Design_Aspect (Aspect : Iir; Add_Default : Boolean);
@@ -971,4 +971,4 @@ package body Configuration is
end if;
end Find_Top_Entity;
-end Configuration;
+end Vhdl.Configuration;
diff --git a/src/vhdl/configuration.ads b/src/vhdl/vhdl-configuration.ads
index 6ec910f00..96d9851ed 100644
--- a/src/vhdl/configuration.ads
+++ b/src/vhdl/vhdl-configuration.ads
@@ -19,7 +19,7 @@ with Types; use Types;
with Iirs; use Iirs;
with Tables;
-package Configuration is
+package Vhdl.Configuration is
package Design_Units is new Tables
(Table_Component_Type => Iir_Design_Unit,
Table_Index_Type => Natural,
@@ -60,4 +60,4 @@ package Configuration is
-- a design file): mark all instantiated units and return the unmarked
-- one if there is only one.
function Find_Top_Entity (From : Iir) return Iir;
-end Configuration;
+end Vhdl.Configuration;