vhdl: move configuration package as a vhdl child.

9 files changed, 25 insertions, 25 deletions

diff --git a/src/ghdldrv/ghdldrv.adb b/src/ghdldrv/ghdldrv.adb
index cdec0eca6..d6e2210ac 100644
--- a/src/ghdldrv/ghdldrv.adb
+++ b/src/ghdldrv/ghdldrv.adb
@@ -27,7 +27,7 @@ with Std_Package;
 with Types; use Types;
 with Iirs; use Iirs;
 with Files_Map;
-with Configuration;
+with Vhdl.Configuration;
 with Default_Paths;
 with Interfaces.C_Streams;
 with System;
@@ -1488,7 +1488,7 @@ package body Ghdldrv is
 
    procedure Perform_Action (Cmd : Command_Make; Args : Argument_List)
    is
-      use Configuration;
+      use Vhdl.Configuration;
 
       File : Iir_Design_File;
       Unit : Iir;
diff --git a/src/ghdldrv/ghdllocal.adb b/src/ghdldrv/ghdllocal.adb
index e723f4629..a400ff69d 100644
--- a/src/ghdldrv/ghdllocal.adb
+++ b/src/ghdldrv/ghdllocal.adb
@@ -29,7 +29,7 @@ with Vhdl.Disp_Vhdl;
 with Default_Paths;
 with Vhdl.Scanner;
 with Errorout;
-with Configuration;
+with Vhdl.Configuration;
 with Files_Map;
 with Options;
 with Iirs_Utils; use Iirs_Utils;
@@ -1166,7 +1166,7 @@ package body Ghdllocal is
          raise Option_Error;
       end if;
 
-      Top := Configuration.Find_Top_Entity (From);
+      Top := Vhdl.Configuration.Find_Top_Entity (From);
 
       if Top = Null_Iir then
          Error ("no top entity found");
@@ -1344,7 +1344,7 @@ package body Ghdllocal is
          Append_Element (List, File);
       end Build_Dependence_List;
 
-      use Configuration;
+      use Vhdl.Configuration;
       use Name_Table;
 
       Top : Iir;
diff --git a/src/ghdldrv/ghdlrun.adb b/src/ghdldrv/ghdlrun.adb
index b37d5a464..6763498f7 100644
--- a/src/ghdldrv/ghdlrun.adb
+++ b/src/ghdldrv/ghdlrun.adb
@@ -37,7 +37,7 @@ with Flags;
 with Errorout; use Errorout;
 with Libraries;
 with Vhdl.Canon;
-with Configuration;
+with Vhdl.Configuration;
 with Trans_Be;
 with Translation;
 with Ieee.Std_Logic_1164;
@@ -167,7 +167,7 @@ package body Ghdlrun is
 
       Flags.Flag_Elaborate := True;
 
-      Config := Configuration.Configure (Prim_Name.all, Sec_Name.all);
+      Config := Vhdl.Configuration.Configure (Prim_Name.all, Sec_Name.all);
       if Config = Null_Iir then
          raise Compilation_Error;
       end if;
diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb
index cb534e19b..cc968048f 100644
--- a/src/ghdldrv/ghdlsimul.adb
+++ b/src/ghdldrv/ghdlsimul.adb
@@ -29,7 +29,7 @@ with Errorout; use Errorout;
 with Std_Package;
 with Libraries;
 with Vhdl.Canon;
-with Configuration;
+with Vhdl.Configuration;
 with Iirs_Utils;
 with Simul.Annotations;
 with Simul.Elaboration;
@@ -81,7 +81,7 @@ package body Ghdlsimul is
    is
       use Name_Table;
       use Types;
-      use Configuration;
+      use Vhdl.Configuration;
 
       First_Id : Name_Id;
       Sec_Id : Name_Id;
@@ -102,7 +102,7 @@ package body Ghdlsimul is
       else
          Sec_Id := Get_Identifier (Sec_Name.all);
       end if;
-      Top_Conf := Configuration.Configure (First_Id, Sec_Id);
+      Top_Conf := Vhdl.Configuration.Configure (First_Id, Sec_Id);
       if Top_Conf = Null_Iir then
          raise Compilation_Error;
       end if;
@@ -115,7 +115,7 @@ package body Ghdlsimul is
            (Get_Block_Specification (Get_Block_Configuration (Conf_Unit)));
          Entity : constant Iir := Iirs_Utils.Get_Entity (Arch);
       begin
-         Configuration.Check_Entity_Declaration_Top (Entity);
+         Vhdl.Configuration.Check_Entity_Declaration_Top (Entity);
          if Nbr_Errors > 0 then
             raise Compilation_Error;
          end if;
diff --git a/src/vhdl/translate/ortho_front.adb b/src/vhdl/translate/ortho_front.adb
index 3fc6f4e81..6db015494 100644
--- a/src/vhdl/translate/ortho_front.adb
+++ b/src/vhdl/translate/ortho_front.adb
@@ -27,7 +27,7 @@ with Libraries;
 with Iirs_Utils; use Iirs_Utils;
 with Std_Package;
 with Flags;
-with Configuration;
+with Vhdl.Configuration;
 with Translation;
 with Vhdl.Sem;
 with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
@@ -324,7 +324,7 @@ package body Ortho_Front is
 
       --  Gather dependencies
       pragma Assert (Flags.Flag_Elaborate = False);
-      Configuration.Flag_Load_All_Design_Units := False;
+      Vhdl.Configuration.Flag_Load_All_Design_Units := False;
 
       --  Exclude std.standard
       Set_Configuration_Mark_Flag (Std_Package.Std_Standard_Unit, True);
@@ -450,7 +450,7 @@ package body Ortho_Front is
    is
       use Interfaces.C_Streams;
       use System;
-      use Configuration;
+      use Vhdl.Configuration;
       use Name_Table;
 
       Nul : constant Character := Character'Val (0);
@@ -550,7 +550,7 @@ package body Ortho_Front is
             Trans_Be.Sem_Foreign_Hook := Sem_Foreign_Hook'Access;
             Shlib_Interning.Init;
 
-            Config := Configuration.Configure
+            Config := Vhdl.Configuration.Configure
               (Elab_Entity.all, Elab_Architecture.all);
             if Errorout.Nbr_Errors > 0 then
                --  This may happen (bad entity for example).
@@ -604,7 +604,7 @@ package body Ortho_Front is
 
             Flags.Flag_Elaborate := True;
             Flags.Flag_Only_Elab_Warnings := False;
-            Config := Configuration.Configure
+            Config := Vhdl.Configuration.Configure
               (Elab_Entity.all, Elab_Architecture.all);
             Translation.Elaborate (Config, True);
 
diff --git a/src/vhdl/translate/trans-chap12.adb b/src/vhdl/translate/trans-chap12.adb
index 1659d54fb..00e071010 100644
--- a/src/vhdl/translate/trans-chap12.adb
+++ b/src/vhdl/translate/trans-chap12.adb
@@ -16,7 +16,7 @@
 --  Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 --  02111-1307, USA.
 
-with Configuration;
+with Vhdl.Configuration;
 with Errorout; use Errorout;
 with Std_Package; use Std_Package;
 with Iirs_Utils; use Iirs_Utils;
@@ -419,7 +419,7 @@ package body Trans.Chap12 is
    --  Write to file FILELIST all the files that are needed to link the design.
    procedure Gen_Stubs
    is
-      use Configuration;
+      use Vhdl.Configuration;
 
       --  Add all dependences of UNIT.
       --  UNIT is not used, but added during link.
@@ -527,7 +527,7 @@ package body Trans.Chap12 is
 
    procedure Elaborate (Config : Iir_Design_Unit; Whole : Boolean)
    is
-      use Configuration;
+      use Vhdl.Configuration;
 
       Unit : Iir_Design_Unit;
       Lib_Unit : Iir;
diff --git a/src/vhdl/translate/trans-rtis.adb b/src/vhdl/translate/trans-rtis.adb
index 7a1baf407..b0997006d 100644
--- a/src/vhdl/translate/trans-rtis.adb
+++ b/src/vhdl/translate/trans-rtis.adb
@@ -20,7 +20,7 @@ with Name_Table;
 with Files_Map;
 with Errorout; use Errorout;
 with Iirs_Utils; use Iirs_Utils;
-with Configuration;
+with Vhdl.Configuration;
 with Libraries;
 with Trans.Chap7;
 with Trans; use Trans.Helpers;
@@ -2926,7 +2926,7 @@ package body Trans.Rtis is
 
    procedure Generate_Top (Nbr_Pkgs : out Natural)
    is
-      use Configuration;
+      use Vhdl.Configuration;
 
       Unit : Iir_Design_Unit;
       Lib  : Iir_Library_Declaration;
diff --git a/src/vhdl/configuration.adb b/src/vhdl/vhdl-configuration.adb
index d047da43d..8d06a3a73 100644
--- a/src/vhdl/configuration.adb
+++ b/src/vhdl/vhdl-configuration.adb
@@ -27,7 +27,7 @@ with Vhdl.Sem_Scopes;
 with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
 with Vhdl.Canon;
 
-package body Configuration is
+package body Vhdl.Configuration is
    procedure Add_Design_Concurrent_Stmts (Parent : Iir);
    procedure Add_Design_Block_Configuration (Blk : Iir_Block_Configuration);
    procedure Add_Design_Aspect (Aspect : Iir; Add_Default : Boolean);
@@ -971,4 +971,4 @@ package body Configuration is
       end if;
    end Find_Top_Entity;
 
-end Configuration;
+end Vhdl.Configuration;
diff --git a/src/vhdl/configuration.ads b/src/vhdl/vhdl-configuration.ads
index 6ec910f00..96d9851ed 100644
--- a/src/vhdl/configuration.ads
+++ b/src/vhdl/vhdl-configuration.ads
@@ -19,7 +19,7 @@ with Types; use Types;
 with Iirs; use Iirs;
 with Tables;
 
-package Configuration is
+package Vhdl.Configuration is
    package Design_Units is new Tables
      (Table_Component_Type => Iir_Design_Unit,
       Table_Index_Type => Natural,
@@ -60,4 +60,4 @@ package Configuration is
    --  a design file): mark all instantiated units and return the unmarked
    --  one if there is only one.
    function Find_Top_Entity (From : Iir) return Iir;
-end Configuration;
+end Vhdl.Configuration;