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* Added support for complex set-reset flip-flops in proc_dffClifford Wolf2013-10-241-12/+26
* Improved handling of dff with async resetsClifford Wolf2013-10-211-0/+39
* Moved common techlib files to techlibs/commonClifford Wolf2013-09-153-5/+5
* Added support for "2**n" shifter encodingClifford Wolf2013-08-121-24/+29
* Added $div and $mod technology mappingClifford Wolf2013-08-092-24/+43
* More fixes in ternary op sign handlingClifford Wolf2013-07-121-0/+8
* Fixed sign handling in ternary operatorClifford Wolf2013-07-121-0/+8
* Another vloghammer related bugfixClifford Wolf2013-07-111-0/+7
* More fixes in ast expression sign/width handlingClifford Wolf2013-07-091-13/+15
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2013-07-092-2/+20
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| * Major redesign of expr width/sign detecion (verilog/ast frontend)Clifford Wolf2013-07-092-2/+20
* | Fixed shift ops with large right hand sideClifford Wolf2013-07-091-3/+43
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* Fixed another bug found using vloghammerClifford Wolf2013-07-071-0/+10
* Removed tests/xsthammerClifford Wolf2013-07-0713-1748/+0
* Fixed vivado related xsthammer bugsClifford Wolf2013-07-053-2/+14
* Various improvements in xsthammer report generatorClifford Wolf2013-07-051-6/+23
* Added work-around to isim bug in xsthammer report scriptClifford Wolf2013-07-051-4/+5
* Added CARRY4 Xilinx cell to xsthammer cell libClifford Wolf2013-07-051-0/+13
* Added xsthammer report generatorClifford Wolf2013-07-054-13/+170
* Improved xsthammer quartus supportClifford Wolf2013-07-042-1/+484
* Added Altera Cyclon III cell library to xsthammerClifford Wolf2013-07-043-14/+115
* Added defparam support to Verilog/AST frontendClifford Wolf2013-07-041-0/+16
* Added Altera Quartus support to xsthammerClifford Wolf2013-07-033-2/+39
* Progress in xsthammerClifford Wolf2013-07-035-9/+23
* Added vivado support to xsthammerClifford Wolf2013-06-265-7/+69
* Added timout functionality to SAT solverClifford Wolf2013-06-201-2/+2
* Added "eval" passClifford Wolf2013-06-191-2/+2
* Added more stuff to xsthammer, found first xst bugClifford Wolf2013-06-172-2/+175
* Added ternary op and concat op to xsthammerClifford Wolf2013-06-151-7/+124
* Added consteval testing to xsthammer and fixed bugsClifford Wolf2013-06-131-2/+7
* More xsthammer improvements (using xst 14.5 now)Clifford Wolf2013-06-135-69/+49
* Another fix for a bug found using xsthammerClifford Wolf2013-06-121-4/+8
* Further improved and extended xsthammerClifford Wolf2013-06-116-138/+226
* More xsthammer improvementsClifford Wolf2013-06-102-21/+27
* Progress xsthammer scriptsClifford Wolf2013-06-103-27/+37
* Progress in xsthammer: working proof for cell modelsClifford Wolf2013-06-103-34/+51
* Progress on xsthammerClifford Wolf2013-06-105-0/+268
* Added first xsthammer scriptsClifford Wolf2013-06-104-0/+183
* Fixed undef behavior in tests/asicworld/code_verilog_tutorial_fsm_full_tb.vClifford Wolf2013-05-241-1/+3
* Removed test cases that have been moved to yosys-test.Clifford Wolf2013-05-1783-18963/+0
* Improved vcdcd.pl (added -d option)Clifford Wolf2013-05-141-8/+82
* Some improvements in vcdcd.plClifford Wolf2013-05-141-4/+16
* Fixed a bug in AST frontend for cases with non-blocking assigned variables as...Clifford Wolf2013-04-131-0/+19
* Now only use value from "initial" when no matching "always" block is foundClifford Wolf2013-03-312-14/+1
* Added test cases from 2012 paper on comparison of foss verilog synthesis toolsClifford Wolf2013-03-316-0/+111
* Added k68 (m68k compatible cpu) test case from verilatorClifford Wolf2013-03-313-0/+61
* Renamed hansimem.v test case to mem_arst.vClifford Wolf2013-03-241-1/+0
* Added hansimem testcase (memory with async reset)Clifford Wolf2013-03-241-0/+44
* Set execute bit on tests/openmsp430/run-synth.sh for realClifford Wolf2013-03-171-0/+0
* set executable flags to run-synth.sh, added .gitignoreJohann Glaser2013-03-171-0/+3
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