aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs
Commit message (Expand)AuthorAgeFilesLines
...
* | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-264-8/+10
|\|
| * Add WE to ECP5 dist RAM's abc_scc_break tooEddie Hung2019-06-261-1/+1
| * Update comment on boxesEddie Hung2019-06-262-4/+6
| * Add "WE" to dist RAM's abc_scc_breakEddie Hung2019-06-261-3/+3
* | synth_xilinx's muxcover call to be very conservative -- -nodecodeEddie Hung2019-06-261-1/+1
* | Accidentally removed "simplemap $mux"Eddie Hung2019-06-261-0/+1
* | Replace with <internal options>Eddie Hung2019-06-261-2/+2
* | Rework help_mode for synth_xilinx -widemuxEddie Hung2019-06-261-22/+23
* | Return to upstream synth_xilinx with opt -full and wreduceEddie Hung2019-06-261-19/+3
* | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7muxEddie Hung2019-06-263-44/+92
|\ \
| * | Simulation model verilog fixMiodrag Milanovic2019-06-262-14/+1
| * | Add more ECP5 Diamond flip-flops.whitequark2019-06-262-30/+91
* | | Instead of blocking wreduce on $mux, use -keepdc instead #1132Eddie Hung2019-06-261-2/+2
* | | Do not call opt with -full before muxcoverEddie Hung2019-06-261-1/+1
* | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-261-1/+1
|\ \ \ | | |/ | |/|
| * | Remove unused varEddie Hung2019-06-261-1/+1
* | | Cleanup abc_box_idEddie Hung2019-06-262-10/+10
* | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-264-19/+67
|\| |
| * | Add _nowide variants of LUT libraries in -nowidelut flowsEddie Hung2019-06-264-13/+44
| * | Merge branch 'xaig' of github.com:YosysHQ/yosys into xaigEddie Hung2019-06-261-2/+10
| |\ \
| * \ \ Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-262-9/+26
| |\ \ \
| | * | | synth_ecp5 rename -nomux to -nowidelut, but preserve formerEddie Hung2019-06-261-6/+6
| | * | | Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriak...Eddie Hung2019-06-261-4/+24
| | |\ \ \ | | | |_|/ | | |/| |
| | | * | synth_xilinx: Add -nocarry and -nomux options.Marcin Koƛcielnicki2019-04-301-7/+26
* | | | | Rename -minmuxf to -widemuxEddie Hung2019-06-261-23/+23
* | | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-261-2/+10
|\ \ \ \ \ | | |_|_|/ | |/| | |
| * | | | abc9: Add wire delays to synth_ice40David Shah2019-06-261-2/+10
| |/ / /
| * | | Realistic delays for RAM32X1D tooEddie Hung2019-06-251-2/+2
| * | | Add RAM32X1D box infoEddie Hung2019-06-252-4/+12
| * | | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-255-8/+72
| |\| |
* | | | This optimisation doesn't seem to work...Eddie Hung2019-06-251-24/+24
* | | | Realistic delays for RAM32X1D tooEddie Hung2019-06-241-2/+2
* | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-241-4/+4
|\| | |
| * | | Use LUT delays for dist RAM delaysEddie Hung2019-06-241-4/+4
* | | | Add RAM32X1D box infoEddie Hung2019-06-242-4/+12
* | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-243-1/+17
|\| | |
| * | | Re-enable dist RAM boxes for ECP5Eddie Hung2019-06-241-1/+1
| * | | Revert "Re-enable dist RAM boxes for ECP5"Eddie Hung2019-06-241-1/+1
| * | | Re-enable dist RAM boxes for ECP5Eddie Hung2019-06-241-1/+1
| * | | Add Xilinx dist RAM as comb boxesEddie Hung2019-06-242-0/+16
* | | | Merge remote-tracking branch 'origin/eddie/ram32x1d' into xc7muxEddie Hung2019-06-245-8/+72
|\ \ \ \ | | |/ / | |/| |
| * | | Add RAM32X1D supportEddie Hung2019-06-245-20/+73
* | | | Reduce MuxFx resources in mux techmappingEddie Hung2019-06-241-10/+30
* | | | Reduce number of decomposed muxes during techmapEddie Hung2019-06-241-14/+11
* | | | Revert "Fix techmapping muxes some more"Eddie Hung2019-06-241-4/+4
* | | | Move commentEddie Hung2019-06-241-3/+3
* | | | Fix techmapping muxes some moreEddie Hung2019-06-241-4/+4
* | | | Fix mux techmappingEddie Hung2019-06-241-19/+20
* | | | Modify costs for muxcoverEddie Hung2019-06-241-1/+15
* | | | Change synth_xilinx's -nomux to -minmuxf <int>Eddie Hung2019-06-243-54/+82