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author | Eddie Hung <eddie@fpgeh.com> | 2019-06-26 20:00:15 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-26 20:00:15 -0700 |
commit | a7a88109f5b750862b8e45c194e8094fd32b8a5f (patch) | |
tree | 7f8aa4d6d3edf36f3119ebde8365c64a461060f2 /techlibs | |
parent | b7bef15b16abf1674d9c2efc58536db3abaf0e3d (diff) | |
download | yosys-a7a88109f5b750862b8e45c194e8094fd32b8a5f.tar.gz yosys-a7a88109f5b750862b8e45c194e8094fd32b8a5f.tar.bz2 yosys-a7a88109f5b750862b8e45c194e8094fd32b8a5f.zip |
Update comment on boxes
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/ecp5/abc_5g.box | 5 | ||||
-rw-r--r-- | techlibs/xilinx/abc_xc7.box | 5 |
2 files changed, 6 insertions, 4 deletions
diff --git a/techlibs/ecp5/abc_5g.box b/techlibs/ecp5/abc_5g.box index 15e26b5d5..5309aca87 100644 --- a/techlibs/ecp5/abc_5g.box +++ b/techlibs/ecp5/abc_5g.box @@ -4,8 +4,9 @@ # Box 1 : CCU2C (2xCARRY + 2xLUT4) # Outputs: S0, S1, COUT # (NB: carry chain input/output must be last -# input/output and have been moved there -# overriding the alphabetical ordering) +# input/output and bus has been moved +# there overriding the otherwise +# alphabetical ordering) # name ID w/b ins outs CCU2C 1 1 9 3 diff --git a/techlibs/xilinx/abc_xc7.box b/techlibs/xilinx/abc_xc7.box index 96966a71c..6dd71d758 100644 --- a/techlibs/xilinx/abc_xc7.box +++ b/techlibs/xilinx/abc_xc7.box @@ -18,8 +18,9 @@ MUXF8 2 1 3 1 # Inputs: CYINIT DI0 DI1 DI2 DI3 S0 S1 S2 S3 CI # Outputs: O0 O1 O2 O3 CO0 CO1 CO2 CO3 # (NB: carry chain input/output must be last -# input/output and have been moved there -# overriding the alphabetical ordering) +# input/output and the entire bus has been +# moved there overriding the otherwise +# alphabetical ordering) CARRY4 3 1 10 8 482 - - - - 223 - - - 222 598 407 - - - 400 205 - - 334 |