aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs
diff options
context:
space:
mode:
authorEddie Hung <eddie@fpgeh.com>2019-06-26 10:10:16 -0700
committerEddie Hung <eddie@fpgeh.com>2019-06-26 10:10:16 -0700
commit741ebba70a4036e71adcdad223ce111c4a025365 (patch)
tree0c77866e3ee2e84defd579dd93c23d0df1361530 /techlibs
parent86a5fbcde942ba404df90ae31a87d22e029fb669 (diff)
parent4f0cb3449573acb189e877407d7b19a5d140c9e7 (diff)
downloadyosys-741ebba70a4036e71adcdad223ce111c4a025365.tar.gz
yosys-741ebba70a4036e71adcdad223ce111c4a025365.tar.bz2
yosys-741ebba70a4036e71adcdad223ce111c4a025365.zip
Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/ice40/synth_ice40.cc12
1 files changed, 10 insertions, 2 deletions
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index d8e9786c5..a782f00b9 100644
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -331,8 +331,16 @@ struct SynthIce40Pass : public ScriptPass
run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)");
}
if (!noabc) {
- if (abc == "abc9")
- run(abc + stringf(" -lut +/ice40/abc_%s.lut -box +/ice40/abc_%s.box", device_opt.c_str(), device_opt.c_str()), "(skip if -noabc)");
+ if (abc == "abc9") {
+ int wire_delay;
+ if (device_opt == "lp")
+ wire_delay = 400;
+ else if (device_opt == "u")
+ wire_delay = 750;
+ else
+ wire_delay = 250;
+ run(abc + stringf(" -W %d -lut +/ice40/abc_%s.lut -box +/ice40/abc_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str()), "(skip if -noabc)");
+ }
else
run(abc + " -dress -lut 4", "(skip if -noabc)");
}