iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Put abc_* attributes above port	Eddie Hung	2019-08-23	1	-2/+4
*	Merge pull request #1304 from YosysHQ/eddie/abc9_refactor	Eddie Hung	2019-08-20	1	-2/+8
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\| *	Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithro	Eddie Hung	2019-08-19	1	-2/+2
\| *	Update abc_* attr in ecp5 and ice40	Eddie Hung	2019-08-16	1	-2/+8
* \|	Fix $lut pin ordering inside $__ICE40_CARRY_WRAPPER	Eddie Hung	2019-08-12	1	-1/+1
* \|	Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_ad...	Eddie Hung	2019-08-12	6	-150/+32
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*	Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"	David Shah	2019-08-10	6	-32/+150
*	Merge pull request #1258 from YosysHQ/eddie/cleanup	Clifford Wolf	2019-08-10	3	-5/+5
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\| *	substr() -> compare()	Eddie Hung	2019-08-07	1	-3/+3
\| *	RTLIL::S{0,1} -> State::S{0,1}	Eddie Hung	2019-08-07	1	-1/+1
\| *	stoi -> atoi	Eddie Hung	2019-08-07	1	-1/+1
* \|	Allow whitebox modules to be overwritten	Eddie Hung	2019-08-07	1	-2/+0
* \|	Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER	Eddie Hung	2019-08-07	3	-10/+17
* \|	Add test	Eddie Hung	2019-08-07	1	-1/+10
* \|	Remove ice40_unlut	Eddie Hung	2019-08-07	2	-107/+0
* \|	Wrap SB_CARRY+SB_LUT into $__ICE40_FULL_ADDER	Eddie Hung	2019-08-07	3	-39/+14
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*	ice40: Fix test_dsp_model.sh	David Shah	2019-07-19	1	-1/+1
*	ice40/cells_sim.v: Fix sign of J and K partial products	David Shah	2019-07-19	1	-5/+7
*	ice40/cells_sim.v: LSB of A/B only signed in 8x8 mode	David Shah	2019-07-19	1	-2/+2
*	Add tests for all combinations of A and B signedness for comb mul	Eddie Hung	2019-07-19	2	-1/+229
*	Don't copy ref if exists already	Eddie Hung	2019-07-19	1	-1/+3
*	Merge pull request #1184 from whitequark/synth-better-labels	Clifford Wolf	2019-07-18	1	-2/+2
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\| *	synth_{ice40,ecp5}: more sensible pass label naming.	whitequark	2019-07-16	1	-2/+2
* \|	ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map	Sylvain Munaut	2019-07-16	2	-4/+4
* \|	Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix	Eddie Hung	2019-07-16	8	-29/+120
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\| *	$__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequark	Eddie Hung	2019-07-15	7	-8/+8
\| *	ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT	Eddie Hung	2019-07-13	1	-9/+7
\| *	Use Const::from_string() not its constructor...	Eddie Hung	2019-07-12	1	-1/+1
\| *	Off by one	Eddie Hung	2019-07-12	1	-1/+1
\| *	Fix spacing	Eddie Hung	2019-07-12	1	-1/+1
\| *	Remove double push	Eddie Hung	2019-07-12	1	-1/+0
\| *	Map to and from this box if -abc9	Eddie Hung	2019-07-12	1	-2/+3
\| *	ice40_opt to handle this box and opt back to SB_LUT4	Eddie Hung	2019-07-12	1	-0/+48
\| *	Add new box to cells_sim.v	Eddie Hung	2019-07-12	1	-2/+25
\| *	_ABC macro will map and unmap to this new box	Eddie Hung	2019-07-12	2	-0/+34
\| *	Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 box	Eddie Hung	2019-07-12	3	-25/+13
* \|	synth_ice40: switch -relut to be always on.	whitequark	2019-07-11	1	-10/+4
* \|	synth_ice40: fix help text typo. NFC.	whitequark	2019-07-11	1	-1/+1
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*	Error out if -abc9 and -retime specified	Eddie Hung	2019-07-10	1	-1/+4
*	Update synth_ice40 -device doc to be relevant for -abc9 only	Eddie Hung	2019-06-28	1	-2/+2
*	Extraneous newline	Eddie Hung	2019-06-27	1	-1/+0
*	Remove noise from ice40/cells_sim.v	Eddie Hung	2019-06-27	1	-5/+0
*	Refactor for one "abc_carry" attribute on module	Eddie Hung	2019-06-27	1	-2/+2
*	abc9: Add wire delays to synth_ice40	David Shah	2019-06-26	1	-2/+10
*	Fix and cleanup ice40 boxes for carry in/out	Eddie Hung	2019-06-22	4	-313/+25
*	Merge remote-tracking branch 'origin/master' into xaig	Eddie Hung	2019-06-20	1	-1/+1
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\| *	Fixed small typo in ice40_unlut help summary	acw1251	2019-06-19	1	-1/+1
\| *	Fixed the help summary line for a few commands	acw1251	2019-06-19	1	-1/+1
* \|	Resolve comments from @daveshah1	Eddie Hung	2019-06-14	1	-1/+1
* \|	Remove WIP ABC9 flop support	Eddie Hung	2019-06-14	1	-25/+25