| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | greenpak4: More fixups of GP_DCMPx cells | Andrew Zonenberg | 2016-12-15 | 1 | -9/+3 | |
| | | ||||||
| * | greenpak4: And another typo :( | Andrew Zonenberg | 2016-12-15 | 1 | -1/+1 | |
| | | ||||||
| * | greenpak4: Fixed another typo | Andrew Zonenberg | 2016-12-15 | 1 | -1/+1 | |
| | | ||||||
| * | greenpak4: Fixed typo | Andrew Zonenberg | 2016-12-15 | 1 | -1/+1 | |
| | | ||||||
| * | greenpak4: Cleaned up trailing spaces in cells_sim | Andrew Zonenberg | 2016-12-14 | 1 | -60/+60 | |
| | | ||||||
| * | greenpak4: Added GP_DCMPREF / GP_DCMPMUX | Andrew Zonenberg | 2016-12-14 | 1 | -0/+23 | |
| | | ||||||
| * | Added GP_PWRDET block, BANDWIDTH_KHZ parameter to GP_ABUF | Andrew Zonenberg | 2016-12-11 | 1 | -1/+9 | |
| | | ||||||
| * | greenpak4: Added support for inferred input/output inverters on latches | Andrew Zonenberg | 2016-12-10 | 1 | -4/+17 | |
| | | ||||||
| * | greenpak4: Can now techmap inferred D latches (without set/reset or output ↵ | Andrew Zonenberg | 2016-12-10 | 3 | -0/+17 | |
| | | | | | inverter) | |||||
| * | greenpak4: Inverted D latch cells now have nQ instead of Q as output port ↵ | Andrew Zonenberg | 2016-12-10 | 1 | -15/+15 | |
| | | | | | name for consistency | |||||
| * | Added GP_DLATCH and GP_DLATCHI | Andrew Zonenberg | 2016-12-05 | 1 | -0/+18 | |
| | | ||||||
| * | Initial implementation of techlib support for GreenPAK latches. ↵ | Andrew Zonenberg | 2016-12-05 | 2 | -0/+120 | |
| | | | | | Instantiation only, no behavioral inference yet. | |||||
| * | Updated help text for synth_greenpak4 | Andrew Zonenberg | 2016-12-05 | 1 | -0/+2 | |
| | | ||||||
| * | Fixed typo in last commit | Andrew Zonenberg | 2016-10-18 | 1 | -1/+1 | |
| | | ||||||
| * | greenpak4: Added GP_PGEN cell definition | Andrew Zonenberg | 2016-10-18 | 1 | -0/+21 | |
| | | ||||||
| * | Added GLITCH_FILTER parameter to GP_DELAY | Andrew Zonenberg | 2016-10-18 | 1 | -3/+2 | |
| | | ||||||
| * | greenpak4: added model for GP_EDGEDET block | Andrew Zonenberg | 2016-10-18 | 1 | -0/+10 | |
| | | ||||||
| * | greenpak4: Changed parameters for GP_SYSRESET | Andrew Zonenberg | 2016-10-16 | 1 | -1/+2 | |
| | | ||||||
| * | Added greenpak4_dffinv | Clifford Wolf | 2016-08-15 | 3 | -0/+199 | |
| | | ||||||
| * | greenpak4: Changed name of inverted output ports for consistency | Andrew Zonenberg | 2016-08-14 | 2 | -19/+19 | |
| | | ||||||
| * | greenpak4: Added GP_DFFxI cells | Andrew Zonenberg | 2016-08-14 | 2 | -0/+68 | |
| | | ||||||
| * | greenpak4: Renamed ports for better consistency (see azonenberg/openfpga:#6) | Andrew Zonenberg | 2016-08-13 | 1 | -10/+10 | |
| | | ||||||
| * | synth_greenpak4: use attrmvcp to move LOC from wires to cells. | whitequark | 2016-08-10 | 1 | -0/+2 | |
| | | ||||||
| * | Added GP_DAC cell | Andrew Zonenberg | 2016-07-11 | 1 | -0/+8 | |
| | | ||||||
| * | Removed VOUT port of GP_BANDGAP | Andrew Zonenberg | 2016-07-11 | 1 | -1/+1 | |
| | | ||||||
| * | Removed splitnets in prep for new gp4par parser | Andrew Zonenberg | 2016-07-11 | 1 | -1/+0 | |
| | | ||||||
| * | greenpak4: add GP_COUNT{8,14}_ADV cells. | whitequark | 2016-07-10 | 1 | -0/+26 | |
| | | ||||||
| * | Added "nlutmap -assert" | Clifford Wolf | 2016-06-09 | 1 | -3/+3 | |
| | | ||||||
| * | Added GP_DELAY cell | Andrew Zonenberg | 2016-05-07 | 1 | -0/+29 | |
| | | ||||||
| * | Fixed typo in port name | Andrew Zonenberg | 2016-05-07 | 1 | -1/+1 | |
| | | ||||||
| * | Fixed extra semicolon | Andrew Zonenberg | 2016-05-07 | 1 | -1/+1 | |
| | | ||||||
| * | Fixed typo in parameter name | Andrew Zonenberg | 2016-05-07 | 1 | -1/+1 | |
| | | ||||||
| * | Added simulation timescale declaration | Andrew Zonenberg | 2016-05-07 | 1 | -0/+2 | |
| | | ||||||
| * | Changed order of passes for better handling of INIT attributes on "output ↵ | Andrew Zonenberg | 2016-05-04 | 1 | -2/+2 | |
| | | | | | reg" FFs | |||||
| * | Renamed module parameter | Andrew Zonenberg | 2016-05-04 | 1 | -4/+4 | |
| | | ||||||
| * | Refactored synth_greenpak4 to use iopadmap for mapping GP_IOBUF/GP_OBUFT ↵ | Andrew Zonenberg | 2016-05-04 | 3 | -18/+1 | |
| | | | | | cells instead of extract | |||||
| * | Fixed incorrect signal naming in GP_IOBUF | Andrew Zonenberg | 2016-05-04 | 1 | -2/+2 | |
| | | ||||||
| * | Added tri-state I/O extraction for GreenPak | Andrew Zonenberg | 2016-05-03 | 5 | -2/+29 | |
| | | ||||||
| * | Added GreenPak I/O buffer cells | Andrew Zonenberg | 2016-05-03 | 1 | -0/+17 | |
| | | ||||||
| * | Added comment to clarify GP_ABUF cell | Andrew Zonenberg | 2016-05-02 | 1 | -0/+2 | |
| | | ||||||
| * | Added GP_ABUF cell | Andrew Zonenberg | 2016-05-02 | 1 | -0/+6 | |
| | | ||||||
| * | Added GP_PGA cell | Andrew Zonenberg | 2016-04-27 | 1 | -0/+11 | |
| | | ||||||
| * | Removed VIN_BUF_EN | Andrew Zonenberg | 2016-04-24 | 1 | -1/+0 | |
| | | ||||||
| * | Renamed VOUT to OUT on GP_ACMP cell | Andrew Zonenberg | 2016-04-23 | 1 | -1/+3 | |
| | | ||||||
| * | Added GP_ACMP cell | Andrew Zonenberg | 2016-04-23 | 1 | -0/+12 | |
| | | ||||||
| * | Run clean after splitnets in synth_greenpak4 | Clifford Wolf | 2016-04-23 | 1 | -1/+1 | |
| | | ||||||
| * | Merge https://github.com/azonenberg/yosys | Clifford Wolf | 2016-04-23 | 1 | -1/+7 | |
| |\ | ||||||
| | * | Fixed typo | Andrew Zonenberg | 2016-04-22 | 1 | -1/+1 | |
| | | | ||||||
| | * | Merge https://github.com/cliffordwolf/yosys | Andrew Zonenberg | 2016-04-22 | 2 | -2/+2 | |
| | |\ | ||||||
| | * | | Added GP_VREF cell | Andrew Zonenberg | 2016-04-20 | 1 | -0/+6 | |
| | | | | ||||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |