| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add comment | Eddie Hung | 2019-08-07 | 1 | -2/+3 |
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| * | Revert "Add TODO" | Eddie Hung | 2019-08-07 | 1 | -2/+0 |
| | | | | | This reverts commit 6068a6bf0d91e3ab9a5eaa33894a816f1560f99a. | ||||
| * | Add TODO | Eddie Hung | 2019-08-07 | 1 | -0/+2 |
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| * | Compute box_lookup just once | Eddie Hung | 2019-08-07 | 1 | -8/+24 |
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| * | Merge pull request #1213 from YosysHQ/eddie/wreduce_add | Clifford Wolf | 2019-08-07 | 2 | -3/+28 |
| |\ | | | | | wreduce/opt_expr: improve width reduction for $add and $sub cells | ||||
| | * | Move LSB-trimming functionality from wreduce to opt_expr | Eddie Hung | 2019-08-06 | 2 | -23/+26 |
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| | * | Merge remote-tracking branch 'origin/master' into eddie/wreduce_add | Eddie Hung | 2019-08-06 | 7 | -43/+118 |
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| | * | | Try and fix again | Eddie Hung | 2019-07-19 | 1 | -5/+4 |
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| | * | | Do not access beyond bounds | Eddie Hung | 2019-07-19 | 1 | -1/+1 |
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| | * | | Wrap A and B in sigmap | Eddie Hung | 2019-07-19 | 1 | -2/+2 |
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| | * | | Remove "top" from message | Eddie Hung | 2019-07-19 | 1 | -1/+1 |
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| | * | | Also optimise MSB of $sub | Eddie Hung | 2019-07-19 | 1 | -3/+3 |
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| | * | | wreduce for $sub | Eddie Hung | 2019-07-19 | 1 | -0/+23 |
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| * | | | Tweak default gate costs, cleanup "stat -tech cmos" | Clifford Wolf | 2019-08-07 | 1 | -16/+6 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | Redesign of cell cost API | Clifford Wolf | 2019-08-07 | 1 | -22/+20 |
| | |/ |/| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs | Clifford Wolf | 2019-08-06 | 3 | -29/+67 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Merge pull request #1242 from jfng/fix-proc_prune-partial | whitequark | 2019-08-03 | 1 | -2/+11 |
| |\ \ | | | | | | | proc_prune: Promote partially redundant assignments. | ||||
| | * | | proc_prune: Promote partially redundant assignments. | Jean-François Nguyen | 2019-08-01 | 1 | -2/+11 |
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| * | | | Merge pull request #1238 from mmicko/vsbuild_fix | Clifford Wolf | 2019-08-02 | 1 | -0/+1 |
| |\ \ \ | | | | | | | | | Visual Studio build fix | ||||
| | * | | | Visual Studio build fix | Miodrag Milanovic | 2019-07-31 | 1 | -0/+1 |
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| * / / | Fix formatting for msys2 mingw build using GetSize | Miodrag Milanovic | 2019-08-01 | 3 | -10/+10 |
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| * / | Add "stat -tech cmos" | Clifford Wolf | 2019-07-20 | 1 | -2/+29 |
| |/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters | Eddie Hung | 2019-07-16 | 1 | -44/+127 |
| |\ | | | | | abc9: push inverters driving box inputs (comb outputs) through $lut soft logic | ||||
| | * | Add comment | Eddie Hung | 2019-07-13 | 1 | -0/+5 |
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| | * | duplicate -> clone | Eddie Hung | 2019-07-12 | 1 | -3/+3 |
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| | * | More cleanup | Eddie Hung | 2019-07-12 | 1 | -8/+2 |
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| | * | Cleanup | Eddie Hung | 2019-07-12 | 1 | -29/+51 |
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| | * | Cleanup | Eddie Hung | 2019-07-12 | 1 | -10/+4 |
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| | * | Cleanup | Eddie Hung | 2019-07-12 | 1 | -15/+24 |
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| | * | More cleanup | Eddie Hung | 2019-07-12 | 1 | -11/+10 |
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| | * | Cleanup | Eddie Hung | 2019-07-12 | 1 | -46/+16 |
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| | * | Cleanup | Eddie Hung | 2019-07-12 | 1 | -7/+1 |
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| | * | Cleanup | Eddie Hung | 2019-07-12 | 1 | -13/+109 |
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| * | | Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix | Eddie Hung | 2019-07-16 | 1 | -2/+2 |
| |\ \ | | | | | | | abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box | ||||
| | * | | Do not double count cells in abc | Eddie Hung | 2019-07-12 | 1 | -2/+2 |
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| * | | Fix check logic in extract_fa | Miodrag Milanovic | 2019-07-16 | 1 | -2/+2 |
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| * | | Merge pull request #1189 from YosysHQ/eddie/fix1151 | Clifford Wolf | 2019-07-15 | 1 | -0/+4 |
| |\ \ | | | | | | | Error out if enable > dbits in memory_bram file | ||||
| | * | | Error out if enable > dbits | Eddie Hung | 2019-07-13 | 1 | -0/+4 |
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| * | | Merge pull request #1190 from YosysHQ/eddie/fix_1099 | Clifford Wolf | 2019-07-15 | 1 | -4/+8 |
| |\ \ | | | | | | | extract_fa to return nothing more gracefully | ||||
| | * | | If ConstEval fails do not log_abort() but return gracefully | Eddie Hung | 2019-07-13 | 1 | -4/+8 |
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| * / | opt_lut: make less chatty. | whitequark | 2019-07-13 | 1 | -56/+38 |
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| * | Enable &mfs for abc9, even if it only currently works for ice40 | Eddie Hung | 2019-07-11 | 1 | -1/+1 |
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| * | Merge pull request #1179 from whitequark/attrmap-proc | Clifford Wolf | 2019-07-11 | 1 | -0/+19 |
| |\ | | | | | attrmap: also consider process, switch and case attributes | ||||
| | * | attrmap: also consider process, switch and case attributes. | whitequark | 2019-07-10 | 1 | -0/+19 |
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| * | | Merge pull request #1177 from YosysHQ/clifford/async | Clifford Wolf | 2019-07-10 | 1 | -0/+7 |
| |\ \ | |/ |/| | Fix clk2fflogic adff reset semantic to negative hold time on reset | ||||
| | * | Fix tests/various/async FFL test | Clifford Wolf | 2019-07-09 | 1 | -0/+7 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Merge pull request #1174 from YosysHQ/eddie/fix1173 | Clifford Wolf | 2019-07-09 | 1 | -0/+3 |
| |\ \ | | | | | | | Increment _TECHMAP_BITS_CONNMAP_ by one since counting from zero | ||||
| | * | | Increment _TECHMAP_BITS_CONNMAP_ by one since counting from zero | Eddie Hung | 2019-07-09 | 1 | -0/+3 |
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| * / | Revert "Add "synth -keepdc" option" | Eddie Hung | 2019-07-09 | 1 | -1/+1 |
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| * | Merge pull request #1168 from whitequark/bugpoint-processes | Clifford Wolf | 2019-07-09 | 2 | -17/+105 |
| |\ | | | | | Add support for processes in bugpoint | ||||
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index : iCE40/yosys | |
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