diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 13:19:21 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-07 09:54:27 -0700 |
| commit | f20acbc8137250d93c10dbf056d50dd93edd3f25 (patch) | |
| tree | f7e8b1a46168365c59fd6098ecb52f5f408e2de8 /passes | |
| parent | 789585a7445f8d63d9a251a9781434bc60d7f30c (diff) | |
| download | yosys-f20acbc8137250d93c10dbf056d50dd93edd3f25.tar.gz yosys-f20acbc8137250d93c10dbf056d50dd93edd3f25.tar.bz2 yosys-f20acbc8137250d93c10dbf056d50dd93edd3f25.zip | |
Revert "Add TODO"
This reverts commit 6068a6bf0d91e3ab9a5eaa33894a816f1560f99a.
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/techmap/abc9.cc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index f15aded84..df14f8f7e 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -736,8 +736,6 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri } } - // TODO: Move this optimisation into parse_xaiger, so that we - // can get save on the "clean" call at the end of this function for (auto &it : bit_users) if (bit_drivers.count(it.first)) for (auto driver_cell : bit_drivers.at(it.first)) |