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* proc_clean: fix order of switch insertion.whitequark2019-08-191-2/+1
| | | | Fixes #1268.
* Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-101-2/+2
|\ | | | | Cleanup a few barnacles across codebase
| * Make liberal use of IdString.in()Eddie Hung2019-08-061-2/+2
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* | proc_prune: fix handling of exactly identical assigns.whitequark2019-08-081-9/+7
|/ | | | | | | | | | | | | | | | | Before this commit, in a process like: process $proc$bug.v:8$3 assign $foo \bar switch \sel case 1'1 assign $foo 1'1 assign $foo 1'1 case assign $foo 1'0 end end both of the "assign $foo 1'1" would incorrectly be removed. Fixes #1243.
* proc_prune: Promote partially redundant assignments.Jean-François Nguyen2019-08-011-2/+11
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* Merge pull request #1168 from whitequark/bugpoint-processesClifford Wolf2019-07-091-8/+24
|\ | | | | Add support for processes in bugpoint
| * proc_clean: add -quiet option.whitequark2019-07-091-8/+24
| | | | | | | | This is useful for other passes that call it often, like bugpoint.
* | Merge pull request #1169 from whitequark/more-proc-cleanupsClifford Wolf2019-07-095-22/+168
|\ \ | | | | | | A new proc_prune pass
| * | proc_prune: promote assigns to module connections when legal.whitequark2019-07-093-33/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This can pave the way for further transformations by exposing identities that were previously hidden in a process to any pass that uses SigMap. Indeed, this commit removes some ad-hoc logic from proc_init that appears to have been tailored to the output of genrtlil in favor of using `SigMap.apply()`. (This removal is not optional, as the ad-hoc logic cannot cope with the result of running proc_prune; a similar issue was fixed in proc_arst.)
| * | proc_prune: new pass.whitequark2019-07-093-1/+138
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The proc_prune pass is similar in nature to proc_rmdead pass: while proc_rmdead removes branches that never become active because another branch preempts it, proc_prune removes assignments that never become active because another assignment preempts them. Genrtlil contains logic similar to the proc_prune pass, but their purpose is different: genrtlil has to prune assignments to adapt the semantics of blocking assignments in HDLs (latest assignment wins) to semantics of assignments in RTLIL processes (assignment in the most specific case wins). On the other hand proc_prune is a general purpose RTLIL simplification that benefits all frontends, even those not using the Yosys AST library. The proc_prune pass is added to the proc script after proc_rmdead, since it gives better results with fewer branches.
* / proc_mux: consider \src attribute on CaseRule.whitequark2019-07-081-10/+16
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* Improve proc full_case detection and handling, fixes #931Clifford Wolf2019-04-182-5/+63
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Revert #895Eddie Hung2019-04-161-28/+0
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* Revert "Recognise default entry in case even if all cases covered (fix for ↵Eddie Hung2019-04-151-1/+1
| | | | #931)"
* Recognise default entry in case even if all cases covered (#931)Eddie Hung2019-04-111-1/+1
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* proc_mux: Fix crash when trying to optimize non-existant mux to shiftxSylvain Munaut2019-04-031-1/+1
| | | | | | last_mux_cell can be NULL ... Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* Create one $shiftx per bit in widthEddie Hung2019-03-251-10/+17
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* Add a pmux-to-shiftx optimisation to proc_muxEddie Hung2019-03-231-0/+21
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* proc_clean: fix critical typo.whitequark2019-01-231-1/+1
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* proc_clean: fix fully def check to consider compare/signal length.whitequark2019-01-181-1/+7
| | | | Fixes #790.
* proc_clean: remove any empty cases if all cases use all-def compare.whitequark2018-12-231-6/+28
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* proc_clean: remove any empty cases at the end of the switch.whitequark2018-12-221-7/+3
| | | | Previously, only completely empty switches were removed.
* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-208-16/+16
| | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* Add warnings for driver-driver conflicts between FFs (and other cells) and ↵Clifford Wolf2017-12-121-2/+3
| | | | constants
* Add src attribute to extra cells generated by proc_dlatchClifford Wolf2017-09-091-7/+9
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* Added $global_clock verilog syntax support for creating $ff cellsClifford Wolf2016-10-141-7/+19
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* Added "proc_mux -ifx"Clifford Wolf2016-06-062-19/+43
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* Fix all undef-muxes in dlatch input coneClifford Wolf2016-06-021-34/+72
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* Avoid creating undef-muxes when inferring latches in proc_dlatchClifford Wolf2016-06-011-0/+44
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* Fixed proc_mux performance bugClifford Wolf2016-04-251-0/+3
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* Fixed performance bug in proc_dlatchClifford Wolf2016-04-241-2/+61
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* More flexible handling of initialization valuesClifford Wolf2016-04-221-7/+22
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* Added "yosys -D" featureClifford Wolf2016-04-218-8/+8
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* Preserve empty $pmux default casesClifford Wolf2016-03-311-2/+2
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* Improved proc_mux performance for huge always blocksClifford Wolf2015-12-021-36/+153
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* Re-created command-reference-manual.tex, copied some doc fixes to online helpClifford Wolf2015-08-141-1/+1
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* Fixed trailing whitespacesClifford Wolf2015-07-028-23/+23
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* Minor fixes in handling of "init" attributeClifford Wolf2015-04-091-0/+5
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* Fixed compilation problems with gcc 4.6.3; use enum instead of const ints.Clifford Wolf2015-02-241-2/+4
| | | | (original patch by Andrew Becker <andrew.becker@epfl.ch>)
* Added "proc_dlatch"Clifford Wolf2015-02-123-1/+311
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* Removed SigSpec::extend_xx() apiClifford Wolf2015-01-011-1/+1
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* Renamed extend() to extend_xx(), changed most users to extend_u0()Clifford Wolf2014-12-241-1/+1
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* Added log_warning() APIClifford Wolf2014-11-091-2/+2
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* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-102-2/+2
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* namespace YosysClifford Wolf2014-09-277-22/+58
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* Fixed handling of constant-true branches in proc_cleanClifford Wolf2014-08-122-2/+3
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* More cleanups related to RTLIL::IdString usageClifford Wolf2014-08-021-1/+1
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* Renamed port access function on RTLIL::Cell, added param access functionsClifford Wolf2014-07-313-81/+81
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* Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespaceClifford Wolf2014-07-312-5/+5
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* Using log_assert() instead of assert()Clifford Wolf2014-07-284-11/+8
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