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* Treat all bison warnings as errors in verilog front-endClaire Wolf2020-07-151-1/+1
| | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* Use %precedence in verilog_parser.yClaire Wolf2020-07-151-4/+4
| | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* Fix bison warnings for missing %emptyClaire Wolf2020-07-151-59/+52
| | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* Run bison with -Wall for verilog front-endClaire Wolf2020-07-151-1/+1
| | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* Merge pull request #2257 from antmicro/fix-conflictsclairexen2020-07-151-9/+10
|\ | | | | Restore #2203 and #2244 and fix parser conflicts
| * Add missing semicolonsKamil Rakoczy2020-07-151-5/+5
| | | | | | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * Fix S/R conflictsKamil Rakoczy2020-07-101-1/+2
| | | | | | | | | | | | This commit fixes S/R conflicts introduced by commit 6f9be93. Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * Fix R/R conflictsKamil Rakoczy2020-07-101-10/+1
| | | | | | | | | | | | | | This commit fixes R/R conflicts introduced by commit 7e83a51. Parameter logic is already defined as part of `param_range_type` rule. Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * Revert "Revert PRs #2203 and #2244."Kamil Rakoczy2020-07-101-10/+19
| | | | | | | | This reverts commit 9c120b89ace6c111aa4677616947d18d980b9c1a.
* | Add AST_EDGE support to AstNode::detect_latch(), fixes #2241Claire Wolf2020-07-101-0/+2
|/ | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* verilog_parser: turn S/R and R/R conflicts into hard errors.whitequark2020-07-091-1/+1
| | | | Fixes #2253.
* Revert PRs #2203 and #2244.whitequark2020-07-091-19/+10
| | | | | | | | This reverts commit 7e83a51fc96495c558a31fc3ca6c1a5ba4764f15. This reverts commit b422f2e4d0b8d5bfa97913d6b9dee488b59fc405. This reverts commit 7cb56f34b06de666935fbda315ce7c7bd45048b3. This reverts commit 6f9be939bd7653b0bdcae93a1033a086a4561b68. This reverts commit 76a34dc5f3a60c89efeaa3378ca0e2700a8aebd2.
* Support logic typed parametersLukasz Dalek2020-07-061-7/+10
| | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
* Merge pull request #2132 from YosysHQ/eddie/verific_initialclairexen2020-07-021-17/+36
|\ | | | | verific: rewrite initial assume/asserts prior to elaboration
| * verific: rewrite initial assume/asserts prior to elaborationEddie Hung2020-05-151-17/+36
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* | Merge pull request #2203 from antmicro/fix-grammarclairexen2020-07-011-4/+10
|\ \ | | | | | | Signed and macro grammar update
| * | Parse macro call attached semicolon as empty expressionLukasz Dalek2020-06-261-1/+1
| | | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
| * | Fix integer signing grammarLukasz Dalek2020-06-261-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit fixes signed/unsigned grammar in parameters as defined in SV LRM A2.2.1. Example of correct parameters: parameter integer signed i = 0; parameter integer unsigned i = 0; Example of incorrect parameters: parameter signed integer i = 0; parameter unsigned integer i = 0; Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
* | | Merge pull request #2179 from splhack/static-castclairexen2020-07-016-0/+55
|\ \ \ | | | | | | | | Support SystemVerilog Static Cast
| * | | static cast: simplifyKazuki Sakamoto2020-06-191-0/+7
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| * | | static cast: support changing size and signednessKazuki Sakamoto2020-06-196-0/+48
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Support SystemVerilog Static Cast - size - signedness - (type is not supposted yet) Fix #535
* | | Merge pull request #2136 from zachjs/masterclairexen2020-06-301-1/+5
|\ \ \ | | | | | | | | Allow constant function calls in for loops and generate if and case
| * | | Allow constant function calls in for loops and generate if and caseZachary Snow2020-06-291-1/+5
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* | | | Update verific API version checkMiodrag Milanovic2020-06-301-1/+1
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* | | Fix crash in verific frontendMiodrag Milanovic2020-06-261-1/+2
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* | | Merge pull request #2188 from antmicro/missing-operatorswhitequark2020-06-262-2/+49
|\ \ \ | | | | | | | | Add logic-assignments operators
| * | | Support missing sub-assign and and-assign operatorsKamil Rakoczy2020-06-252-2/+21
| | | | | | | | | | | | | | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * | | Support missing xor-assign operatorLukasz Dalek2020-06-242-1/+10
| | | | | | | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
| * | | Add plus-assignment operatorKamil Rakoczy2020-06-242-1/+10
| | | | | | | | | | | | | | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * | | Add or-assignment operatorKamil Rakoczy2020-06-242-1/+11
| |/ / | | | | | | | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
* | | Merge pull request #2189 from antmicro/optional-labelswhitequark2020-06-261-2/+2
|\ \ \ | | | | | | | | Add support for optional labels
| * | | Support optional labels at the end of package definitionLukasz Dalek2020-06-241-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
| * | | Support optional labels at the end of module definitionLukasz Dalek2020-06-241-1/+1
| |/ / | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
* | | Merge pull request #2168 from whitequark/assert-unused-exprsclairexen2020-06-253-12/+12
|\ \ \ | | | | | | | | Use (and ignore) the expression provided to log_assert in NDEBUG builds
| * | | Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().whitequark2020-06-193-12/+12
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* | | optimization, all items should have same attributesMiodrag Milanovic2020-06-251-0/+1
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* | | verific - import attributes for net buses as wellMiodrag Milanovic2020-06-241-1/+4
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* | Use C++11 final/override keywords.whitequark2020-06-189-34/+34
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* | MSVC does not understand __builtin_unreachableAnonymous Maarten2020-06-171-1/+1
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* | MSVC cannot omit operand in conditionalAnonymous Maarten2020-06-171-1/+1
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* | Merge pull request #2131 from YosysHQ/claire/preserveffsclairexen2020-06-101-0/+3
|\ \ | | | | | | Do not optimize away FFs in "prep" and Verific front-end
| * | Do not optimize away FFs in "prep" and Verific fron-endClaire Wolf2020-06-091-0/+3
| | | | | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* | | verific - detect missing memory to prevent crash.Miodrag Milanovic2020-06-101-2/+7
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* | | Merge pull request #2112 from YosysHQ/claire/fix2040clairexen2020-06-092-0/+58
|\ \ \ | |/ / |/| | Add latch detection for use_case_method in part-select write
| * | Add latch detection for use_case_method in part-select write, fixes #2040Claire Wolf2020-06-042-0/+58
| | | | | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* | | Support packed arrays in struct/union.Peter Crozier2020-06-072-17/+136
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* | Merge pull request #2041 from PeterCrozier/structclairexen2020-06-046-204/+526
|\ \ | | | | | | Implementation of SV structs.
| * \ Merge branch 'master' into structPeter Crozier2020-06-038-53/+95
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| * | | Allow structs within structs.Peter Crozier2020-05-121-7/+18
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| * | | Generalise structs and add support for packed unions.Peter Crozier2020-05-126-58/+147
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