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| author | Lukasz Dalek <ldalek@antmicro.com> | 2020-05-18 21:02:19 +0200 |
|---|---|---|
| committer | Kamil Rakoczy <krakoczy@antmicro.com> | 2020-07-06 09:18:48 +0200 |
| commit | 7e83a51fc96495c558a31fc3ca6c1a5ba4764f15 (patch) | |
| tree | e818a19b9511ff93a660c813b1bc371891bd13ad /frontends | |
| parent | 09ecb9b2cf3ab76841d30712bf70dafc6d47ef67 (diff) | |
| download | yosys-7e83a51fc96495c558a31fc3ca6c1a5ba4764f15.tar.gz yosys-7e83a51fc96495c558a31fc3ca6c1a5ba4764f15.tar.bz2 yosys-7e83a51fc96495c558a31fc3ca6c1a5ba4764f15.zip | |
Support logic typed parameters
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
Diffstat (limited to 'frontends')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 656910c0c..dfdb11cf0 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1337,8 +1337,6 @@ param_signed: param_integer: TOK_INTEGER { - if (astbuf1->children.size() != 1) - frontend_verilog_yyerror("Internal error in param_integer - should not happen?"); astbuf1->children.push_back(new AstNode(AST_RANGE)); astbuf1->children.back()->children.push_back(AstNode::mkconst_int(31, true)); astbuf1->children.back()->children.push_back(AstNode::mkconst_int(0, true)); @@ -1347,16 +1345,19 @@ param_integer: param_real: TOK_REAL { - if (astbuf1->children.size() != 1) - frontend_verilog_yyerror("Parameter already declared as integer, cannot set to real."); astbuf1->children.push_back(new AstNode(AST_REALVALUE)); } +param_logic: + TOK_LOGIC { + // SV LRM 6.11, Table 6-8: logic -- 4-state, user-defined vector size, unsigned + astbuf1->is_signed = false; + astbuf1->is_logic = true; + } + param_range: range { if ($1 != NULL) { - if (astbuf1->children.size() != 1) - frontend_verilog_yyerror("integer/real parameters should not have a range."); astbuf1->children.push_back($1); } }; @@ -1365,8 +1366,10 @@ param_integer_type: param_integer param_signed param_range_type: type_vec param_signed param_range param_implicit_type: param_signed param_range +param_integer_vector_type: param_logic param_signed param_range + param_type: - param_integer_type | param_real | param_range_type | param_implicit_type | + param_integer_type | param_integer_vector_type | param_real | param_range_type | param_implicit_type | hierarchical_type_id { astbuf1->is_custom_type = true; astbuf1->children.push_back(new AstNode(AST_WIRETYPE)); |