Merge pull request #2257 from antmicro/fix-conflicts

Restore #2203 and #2244 and fix parser conflicts

1 files changed, 10 insertions, 9 deletions

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 0fdf2b516..ba2eab3d3 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -742,6 +742,7 @@ module_body:
 	module_body module_body_stmt |
 	/* the following line makes the generate..endgenrate keywords optional */
 	module_body gen_stmt |
+	module_body ';' |
 	/* empty */;
 
 module_body_stmt:
@@ -1331,36 +1332,36 @@ ignspec_id:
 param_signed:
 	TOK_SIGNED {
 		astbuf1->is_signed = true;
+	} | TOK_UNSIGNED {
+		astbuf1->is_signed = false;
 	} | /* empty */;
 
 param_integer:
 	TOK_INTEGER {
-		if (astbuf1->children.size() != 1)
-			frontend_verilog_yyerror("Internal error in param_integer - should not happen?");
 		astbuf1->children.push_back(new AstNode(AST_RANGE));
 		astbuf1->children.back()->children.push_back(AstNode::mkconst_int(31, true));
 		astbuf1->children.back()->children.push_back(AstNode::mkconst_int(0, true));
 		astbuf1->is_signed = true;
-	} | /* empty */;
+	};
 
 param_real:
 	TOK_REAL {
-		if (astbuf1->children.size() != 1)
-			frontend_verilog_yyerror("Parameter already declared as integer, cannot set to real.");
 		astbuf1->children.push_back(new AstNode(AST_REALVALUE));
-	} | /* empty */;
+	};
 
 param_range:
 	range {
 		if ($1 != NULL) {
-			if (astbuf1->children.size() != 1)
-				frontend_verilog_yyerror("integer/real parameters should not have a range.");
 			astbuf1->children.push_back($1);
 		}
 	};
 
+param_integer_type: param_integer param_signed;
+param_range_type: type_vec param_signed param_range;
+param_implicit_type: param_signed param_range;
+
 param_type:
-	param_signed param_integer param_real param_range |
+	param_integer_type | param_real | param_range_type | param_implicit_type |
 	hierarchical_type_id {
 		astbuf1->is_custom_type = true;
 		astbuf1->children.push_back(new AstNode(AST_WIRETYPE));