From de649b91943816149e28a49acb4718e41be2589f Mon Sep 17 00:00:00 2001 From: Kamil Rakoczy Date: Fri, 10 Jul 2020 09:59:48 +0200 Subject: Revert "Revert PRs #2203 and #2244." This reverts commit 9c120b89ace6c111aa4677616947d18d980b9c1a. --- frontends/verilog/verilog_parser.y | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) (limited to 'frontends') diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 0fdf2b516..dfdb11cf0 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -747,7 +747,7 @@ module_body: module_body_stmt: task_func_decl | specify_block | param_decl | localparam_decl | typedef_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt | enum_decl | struct_decl | - always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block; + always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block | /* empty statement */ ';'; checker_decl: TOK_CHECKER TOK_ID ';' { @@ -1331,36 +1331,45 @@ ignspec_id: param_signed: TOK_SIGNED { astbuf1->is_signed = true; + } | TOK_UNSIGNED { + astbuf1->is_signed = false; } | /* empty */; param_integer: TOK_INTEGER { - if (astbuf1->children.size() != 1) - frontend_verilog_yyerror("Internal error in param_integer - should not happen?"); astbuf1->children.push_back(new AstNode(AST_RANGE)); astbuf1->children.back()->children.push_back(AstNode::mkconst_int(31, true)); astbuf1->children.back()->children.push_back(AstNode::mkconst_int(0, true)); astbuf1->is_signed = true; - } | /* empty */; + } param_real: TOK_REAL { - if (astbuf1->children.size() != 1) - frontend_verilog_yyerror("Parameter already declared as integer, cannot set to real."); astbuf1->children.push_back(new AstNode(AST_REALVALUE)); - } | /* empty */; + } + +param_logic: + TOK_LOGIC { + // SV LRM 6.11, Table 6-8: logic -- 4-state, user-defined vector size, unsigned + astbuf1->is_signed = false; + astbuf1->is_logic = true; + } param_range: range { if ($1 != NULL) { - if (astbuf1->children.size() != 1) - frontend_verilog_yyerror("integer/real parameters should not have a range."); astbuf1->children.push_back($1); } }; +param_integer_type: param_integer param_signed +param_range_type: type_vec param_signed param_range +param_implicit_type: param_signed param_range + +param_integer_vector_type: param_logic param_signed param_range + param_type: - param_signed param_integer param_real param_range | + param_integer_type | param_integer_vector_type | param_real | param_range_type | param_implicit_type | hierarchical_type_id { astbuf1->is_custom_type = true; astbuf1->children.push_back(new AstNode(AST_WIRETYPE)); -- cgit v1.2.3 From 0ffaddee5e6422c74fd002f9b1272cfe40839a13 Mon Sep 17 00:00:00 2001 From: Kamil Rakoczy Date: Fri, 10 Jul 2020 10:14:31 +0200 Subject: Fix R/R conflicts This commit fixes R/R conflicts introduced by commit 7e83a51. Parameter logic is already defined as part of `param_range_type` rule. Signed-off-by: Kamil Rakoczy --- frontends/verilog/verilog_parser.y | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'frontends') diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index dfdb11cf0..1c86c7895 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1348,13 +1348,6 @@ param_real: astbuf1->children.push_back(new AstNode(AST_REALVALUE)); } -param_logic: - TOK_LOGIC { - // SV LRM 6.11, Table 6-8: logic -- 4-state, user-defined vector size, unsigned - astbuf1->is_signed = false; - astbuf1->is_logic = true; - } - param_range: range { if ($1 != NULL) { @@ -1366,10 +1359,8 @@ param_integer_type: param_integer param_signed param_range_type: type_vec param_signed param_range param_implicit_type: param_signed param_range -param_integer_vector_type: param_logic param_signed param_range - param_type: - param_integer_type | param_integer_vector_type | param_real | param_range_type | param_implicit_type | + param_integer_type | param_real | param_range_type | param_implicit_type | hierarchical_type_id { astbuf1->is_custom_type = true; astbuf1->children.push_back(new AstNode(AST_WIRETYPE)); -- cgit v1.2.3 From d77b3305d83f6877f2177daecab658067659f4ce Mon Sep 17 00:00:00 2001 From: Kamil Rakoczy Date: Fri, 10 Jul 2020 14:56:14 +0200 Subject: Fix S/R conflicts This commit fixes S/R conflicts introduced by commit 6f9be93. Signed-off-by: Kamil Rakoczy --- frontends/verilog/verilog_parser.y | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'frontends') diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 1c86c7895..b9e721415 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -742,12 +742,13 @@ module_body: module_body module_body_stmt | /* the following line makes the generate..endgenrate keywords optional */ module_body gen_stmt | + module_body ';' | /* empty */; module_body_stmt: task_func_decl | specify_block | param_decl | localparam_decl | typedef_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt | enum_decl | struct_decl | - always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block | /* empty statement */ ';'; + always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block; checker_decl: TOK_CHECKER TOK_ID ';' { -- cgit v1.2.3 From 02c071888b4b2a26db5653609bb60e6c3f5c366f Mon Sep 17 00:00:00 2001 From: Kamil Rakoczy Date: Wed, 15 Jul 2020 10:15:13 +0200 Subject: Add missing semicolons Signed-off-by: Kamil Rakoczy --- frontends/verilog/verilog_parser.y | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'frontends') diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index b9e721415..ba2eab3d3 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1342,12 +1342,12 @@ param_integer: astbuf1->children.back()->children.push_back(AstNode::mkconst_int(31, true)); astbuf1->children.back()->children.push_back(AstNode::mkconst_int(0, true)); astbuf1->is_signed = true; - } + }; param_real: TOK_REAL { astbuf1->children.push_back(new AstNode(AST_REALVALUE)); - } + }; param_range: range { @@ -1356,9 +1356,9 @@ param_range: } }; -param_integer_type: param_integer param_signed -param_range_type: type_vec param_signed param_range -param_implicit_type: param_signed param_range +param_integer_type: param_integer param_signed; +param_range_type: type_vec param_signed param_range; +param_implicit_type: param_signed param_range; param_type: param_integer_type | param_real | param_range_type | param_implicit_type | -- cgit v1.2.3