iCE40/ghdl - clone of https://github.com/ghdl/ghdl

	Commit message (Collapse)	Author	Age	Files	Lines
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*	synth: handle scalar inout association for subprograms. Fix #1064	Tristan Gingold	2020-01-02	1	-0/+2
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*	vhdl: fix order of std_ulogic literals. For #1063	Tristan Gingold	2020-01-02	1	-3/+3
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*	synth-disp_vhdl: handle conversion from signed integers.	Tristan Gingold	2020-01-01	1	-1/+5
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*	synth: optimize integer mod for power of 2.	Tristan Gingold	2020-01-01	3	-0/+31
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*	vhdl: evaluate std_logic matching equality. Fix #1063	Tristan Gingold	2020-01-01	2	-8/+54
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*	vhdl: handle -gGEN=VAL for --synth. Fix #1062	Tristan Gingold	2020-01-01	6	-23/+213
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*	synth-inference: merge reset for sub-nets.	Tristan Gingold	2019-12-31	1	-1/+16
\| \| \| \|	For tgingold/ghdlsynth-beta#76
*	synth-environment: also optimize mux merge for sub-nets.	Tristan Gingold	2019-12-31	3	-1/+34
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*	netlists-disp_vhdl: display iadff.	Tristan Gingold	2019-12-31	2	-7/+19
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*	ams-vhdl: add support for 'delayed for quantity.	Tristan Gingold	2019-12-31	9	-144/+197
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*	ams-vhdl: handle zoh, ltf and ztf attributes.	Tristan Gingold	2019-12-31	14	-71/+358
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*	ams-vhdl: add simultaneous null statement.	Tristan Gingold	2019-12-30	11	-155/+449
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*	ams-vhdl: add frequency function, minor fixes.	Tristan Gingold	2019-12-30	6	-6/+26
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*	ams-vhdl: handle record nature end name.	Tristan Gingold	2019-12-30	2	-0/+5
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*	ams-vhdl: improve error recovery	Tristan Gingold	2019-12-30	6	-61/+92
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*	ams-vhdl: analyze, canon and print simultaneous procedural statements.	Tristan Gingold	2019-12-30	6	-90/+175
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*	ams-vhdl: fix tree consistency for terminal declaration.	Tristan Gingold	2019-12-30	2	-3/+3
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*	ams-vhdl: correctly test and set staticness of dot/integ attributes.	Tristan Gingold	2019-12-30	1	-8/+7
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*	ams-vhdl: print subnature declarations.	Tristan Gingold	2019-12-30	1	-1/+16
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*	ams-vhdl: check nature for record natures and terminals.	Tristan Gingold	2019-12-30	7	-231/+397
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*	vhdl-ams: fix tree consistency for subnature declaration.	Tristan Gingold	2019-12-29	4	-9/+9
\| \| \| \|	Also fix use and canon for it.
*	vhdl-ams: fix overload for simple simultaneous statement.	Tristan Gingold	2019-12-29	3	-4/+26
\| \| \| \|	Fix tree consistency for branch quantity declarations.
*	synth: handle wire assigned to a static value. Fix #1058	Tristan Gingold	2019-12-29	3	-9/+104
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*	vhdl: improve support of AMS-vhdl (array and record natures, source quantities)	Tristan Gingold	2019-12-28	36	-1059/+5977
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*	vhdl: add Has_Delay_Machanism for optional 'inertial' printing.	Tristan Gingold	2019-12-26	6	-93/+165
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*	vhdl-prints: subtype indication is optional in object alias.	Tristan Gingold	2019-12-26	1	-3/+2
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*	libraries: handle redefinition of a package by an entity.	Tristan Gingold	2019-12-26	1	-75/+80
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*	vhdl: handle non-object aliases in selected use clause. Fix #1057	Tristan Gingold	2019-12-24	1	-5/+8
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*	synth: handle is_x (as false). Fix #1054	Tristan Gingold	2019-12-24	1	-0/+4
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*	vhdl: recognize ieee.std_logic_1164.is_x.	Tristan Gingold	2019-12-24	4	-8/+19
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*	ghdlsynth: allow display for libghdl.	Tristan Gingold	2019-12-24	1	-21/+42
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*	netlists-disp_vhdl: handle conversion from std_logic to signed/unsigned.	Tristan Gingold	2019-12-24	2	-8/+20
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*	netlists-memories: add convert_to_memory.	Tristan Gingold	2019-12-24	1	-298/+504
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*	synth: add minor comments.	Tristan Gingold	2019-12-23	2	-1/+3
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*	synth: add Get_Input_Instance.	Tristan Gingold	2019-12-14	4	-10/+21
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*	netlists-memories: add comments.	Tristan Gingold	2019-12-14	1	-2/+44
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*	netlists-memories: remove unused subprograms.	Tristan Gingold	2019-12-08	1	-318/+0
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*	netlists-memories: reduce muxes.	Tristan Gingold	2019-12-08	1	-1/+162
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*	synth: rework in netlists-memories.	Tristan Gingold	2019-12-06	1	-61/+128
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*	netlists-disp_vhdl: handle 1-bit add/sub.	Tristan Gingold	2019-12-05	1	-4/+12
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*	netlists-memories: avoid a crash when no read. Fix #1018	Tristan Gingold	2019-12-05	1	-1/+7
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*	netlists-disp_vhdl: handle more ROMs.	Tristan Gingold	2019-12-05	1	-2/+12
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*	netlists-memories: improve ROM inference. For issue #1008	Tristan Gingold	2019-12-05	1	-26/+48
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*	netlists-dump: adjust can_inline after cleanup of	Tristan Gingold	2019-12-05	1	-4/+20
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*	netlists-memories: generate mem_rd_sync gates.	Tristan Gingold	2019-12-05	2	-170/+142
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*	netlists-gates: add comments.	Tristan Gingold	2019-12-05	1	-3/+13
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*	netlists-disp_vhdl: handle id_mem_rd_sync	Tristan Gingold	2019-12-05	1	-0/+15
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*	netlists: add enable port to id_mem_rd_sync.	Tristan Gingold	2019-12-05	2	-10/+20
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*	netlists: add remove_output_gates.	Tristan Gingold	2019-12-05	3	-0/+31
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*	netlists-memories: rework.	Tristan Gingold	2019-12-05	3	-3/+857
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