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-rw-r--r--testsuite/gna/issue233/repro.vhdl41
-rw-r--r--testsuite/gna/issue233/test.vhdl19
-rwxr-xr-xtestsuite/gna/issue233/testsuite.sh13
3 files changed, 73 insertions, 0 deletions
diff --git a/testsuite/gna/issue233/repro.vhdl b/testsuite/gna/issue233/repro.vhdl
new file mode 100644
index 000000000..c0a826030
--- /dev/null
+++ b/testsuite/gna/issue233/repro.vhdl
@@ -0,0 +1,41 @@
+ENTITY test1 IS
+ PORT (
+ i : IN integer);
+END ENTITY test1;
+
+architecture behav of test1 is
+begin
+ process
+ begin
+ wait for 1 ns;
+ assert i = 5 report "bad signal value" severity failure;
+ wait;
+ end process;
+end behav;
+
+ENTITY test IS
+ PORT (
+ o : OUT integer);
+END ENTITY test;
+
+ARCHITECTURE rtl OF test IS
+
+BEGIN
+
+ test1_1 : ENTITY work.test1
+ PORT MAP (
+ i => o);
+
+END ARCHITECTURE rtl;
+
+entity repro is
+end repro;
+
+architecture behav of repro is
+ signal s : integer;
+begin
+
+ t: entity work.test port map (s);
+
+ s <= 5;
+end behav;
diff --git a/testsuite/gna/issue233/test.vhdl b/testsuite/gna/issue233/test.vhdl
new file mode 100644
index 000000000..a64e208c6
--- /dev/null
+++ b/testsuite/gna/issue233/test.vhdl
@@ -0,0 +1,19 @@
+ENTITY test1 IS
+ PORT (
+ i : IN integer);
+END ENTITY test1;
+
+ENTITY test IS
+ PORT (
+ o : OUT integer);
+END ENTITY test;
+
+ARCHITECTURE rtl OF test IS
+
+BEGIN
+
+ test1_1 : ENTITY work.test1
+ PORT MAP (
+ i => o);
+
+END ARCHITECTURE rtl;
diff --git a/testsuite/gna/issue233/testsuite.sh b/testsuite/gna/issue233/testsuite.sh
new file mode 100755
index 000000000..9f881e018
--- /dev/null
+++ b/testsuite/gna/issue233/testsuite.sh
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze test.vhdl
+
+analyze repro.vhdl
+elab_simulate repro
+
+clean
+
+echo "Test successful"