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author | Tristan Gingold <tgingold@free.fr> | 2019-07-30 20:57:16 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-07-30 20:57:16 +0200 |
commit | ca8803efc8b2c52b813bf22df814c26e139889e2 (patch) | |
tree | 3f053777658887a7e7d69c181cde34f25c66aced /src | |
parent | 8a6f0ea2e97693dcefecfb29697f835729ead164 (diff) | |
download | ghdl-ca8803efc8b2c52b813bf22df814c26e139889e2.tar.gz ghdl-ca8803efc8b2c52b813bf22df814c26e139889e2.tar.bz2 ghdl-ca8803efc8b2c52b813bf22df814c26e139889e2.zip |
synth: adjust output for dyn_insert, add dpram2 test.
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 95d01102a..800fc585c 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -571,8 +571,8 @@ package body Netlists.Disp_Vhdl is " begin" & NL & " \o0 <= \i0;" & NL & " \o0 (" & - "to_integer (signed (\i2)) * \p0 + (\sp1 + \n0)" & NL & - " downto to_integer (signed (\i2)) * \p0 + (\sp1))" & + "to_integer (\ui2) * \p0 + (\sp1 + \n0)" & NL & + " downto to_integer (\ui2) * \p0 + (\sp1))" & " <= \i1;" & NL & " end process;" & NL, Inst, (0 => Iw - 1)); |