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| author | root <root@new-fish.medaka.james.internal> | 2025-05-01 21:07:24 +0100 |
|---|---|---|
| committer | root <root@new-fish.medaka.james.internal> | 2025-05-01 21:07:24 +0100 |
| commit | 5aaf9d42ebe4767b7a076a2c615406549b4529f4 (patch) | |
| tree | f8c92ab2f4df71c66751fa650b2a522aa50215f9 /fpga/hp_lcd_driver/delay.vhdl | |
| parent | 4c3c9419ec26b863ee22e56730f036254d09d16a (diff) | |
| download | hp_instrument_lcds-5aaf9d42ebe4767b7a076a2c615406549b4529f4.tar.gz hp_instrument_lcds-5aaf9d42ebe4767b7a076a2c615406549b4529f4.tar.bz2 hp_instrument_lcds-5aaf9d42ebe4767b7a076a2c615406549b4529f4.zip | |
tidyingup
Diffstat (limited to 'fpga/hp_lcd_driver/delay.vhdl')
| -rw-r--r-- | fpga/hp_lcd_driver/delay.vhdl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/hp_lcd_driver/delay.vhdl b/fpga/hp_lcd_driver/delay.vhdl index 2e777b6..66c5c5d 100644 --- a/fpga/hp_lcd_driver/delay.vhdl +++ b/fpga/hp_lcd_driver/delay.vhdl @@ -9,7 +9,7 @@ entity delay is end delay; architecture Behavioral of delay is - signal flipflops : std_logic_vector(stages-1 downto 0) := (others => '0'); + signal flipflops : std_logic_vector(stages-1 downto 0) := (others => '0'); begin o <= flipflops(flipflops'high); |