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-rw-r--r--fpga/hp_lcd_driver/delay.vhdl2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/hp_lcd_driver/delay.vhdl b/fpga/hp_lcd_driver/delay.vhdl
index 2e777b6..66c5c5d 100644
--- a/fpga/hp_lcd_driver/delay.vhdl
+++ b/fpga/hp_lcd_driver/delay.vhdl
@@ -9,7 +9,7 @@ entity delay is
end delay;
architecture Behavioral of delay is
- signal flipflops : std_logic_vector(stages-1 downto 0) := (others => '0');
+ signal flipflops : std_logic_vector(stages-1 downto 0) := (others => '0');
begin
o <= flipflops(flipflops'high);