diff options
author | fishsoupisgood <github@madingley.org> | 2018-05-17 09:17:21 +0100 |
---|---|---|
committer | fishsoupisgood <github@madingley.org> | 2018-05-17 09:17:21 +0100 |
commit | 0780df86a9ec88bf8810f7fef1d241030dc1b655 (patch) | |
tree | 616b7af709d554a64de9c6077e34c8d64919c875 /Makefile | |
download | rob_spdif-0780df86a9ec88bf8810f7fef1d241030dc1b655.tar.gz rob_spdif-0780df86a9ec88bf8810f7fef1d241030dc1b655.tar.bz2 rob_spdif-0780df86a9ec88bf8810f7fef1d241030dc1b655.zip |
first version for rob - supports only 44.1kHz
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..2373f0c --- /dev/null +++ b/Makefile @@ -0,0 +1,70 @@ +PROJ=spdif + +SRCS=$(wildcard *.vhd *.v *.qsf *.qpf ) +TIDY_SRC= bmc_decoder.vhd ccd.vhd clock_recovery.vhd counter.vhd dflipflop.vhd spdif_decoder.vhd spdif.vhd + +SOF=${PROJ}.sof +POF=${PROJ}.pof +JIC=${PROJ}.jic + +default: load_sof.stamp sim.stamp + + + +sta.stamp:asm.stamp + tools/wrap quartus_sta ${PROJ} -c ${PROJ} + touch $@ + +asm.stamp:fit.stamp + tools/wrap quartus_asm --read_settings_files=off --write_settings_files=off ${PROJ} -c ${PROJ} + touch $@ + +${POF} ${SOF}:asm.stamp + +fit.stamp: ans.stamp + tools/wrap quartus_fit --read_settings_files=off --write_settings_files=off ${PROJ} -c ${PROJ} + touch $@ + +ans.stamp: ${SRCS} + tools/wrap quartus_map --read_settings_files=on --write_settings_files=off ${PROJ} -c ${PROJ} + touch $@ + +sim.stamp: fit.stamp + tools/wrap quartus_eda ${PROJ} --simulation --tool=modelsim --format=verilog + + +load_sof.stamp: ${SOF} + tools/wrap quartus_pgm -m JTAG -o "p;${SOF}" + +#flash: ${POF} +# tools/wrap quartus_pgm -m AS -o "p;${POF}" + +quartus: + tools/wrap quartus ${PROJ}.qpf + +jtagd: + sudo killall jtagd || true + sudo tools/wrap jtagd + +clean: + /bin/rm -rf ${BSP_DIR} db incremental_db src/obj simulation output_files + /bin/rm -f ${SOPC_FILE} src/Makefile elf.flash sof.flash *.stamp ${SOF} ${ELF} *.rpt *.html *.summary *.pin *.jdi *.qws *.pof *.smsg + /bin/rm -f src/${PROJ}.objdump src/${PROJ}.map + /bin/rm -f sopc_builder_log.txt src/*~ SDIF/*~ + /bin/rm -f sim.stamp *.orig + + + +${JIC}:${SOF} + tools/wrap quartus_cpf -c ${PROJ}.cof + + +flash:${JIC} + tools/wrap quartus_pgm -m JTAG -o "ip;${JIC}" + tools/wrap quartus_pgm -m JTAG -o "p;${SOF}" + + + +tidy: + for i in ${TIDY_SRC}; do tools/vhdl-pretty < $$i > $$i.pp && mv -f $$i $$i.orig && mv $$i.pp $$i ; done + |