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* Add test for bug 3462Miodrag Milanovic2022-08-292-0/+15
* write_aiger: Fix non-$_FF_ FFsJannis Harder2022-08-181-0/+7
* smtbmc: Add native json based witness format + smt2 backend supportJannis Harder2022-08-161-0/+8
* Merge pull request #3277 from YosysHQ/lofty/rename-scramble_nameN. Engelhardt2022-08-111-0/+31
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| * rename: add -scramble-name option to randomly rename selectionsLofty2022-08-081-0/+31
* | support file locations containing spacesMiodrag Milanovic2022-08-083-9/+10
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* gatemate: Add test for LUT tree mappinggatecat2022-06-273-0/+813
* Adding expected error message.Archie2022-06-221-0/+1
* Adding testcase for issue 3374Archie2022-06-221-0/+3
* smt2: emit smtlib2_comb_expr outputs after all inputsJannis Harder2022-06-072-6/+6
* don't use sed -i because it won't work on macosJacob Lifshay2022-06-032-2/+3
* smtlib2_module: try to fix test on macosJacob Lifshay2022-06-021-1/+1
* smt2: Add smtlib2_comb_expr attribute to allow user-selected smtlib2 expressionsJacob Lifshay2022-06-024-0/+127
* verilog: fix width/sign detection for functionsZachary Snow2022-05-302-0/+46
* verilog: fix size and signedness of array querying functionsJannis Harder2022-05-301-0/+52
* verilog: fix $past's signednessJannis Harder2022-05-251-0/+35
* verilog: fix signedness when removing unreachable casesJannis Harder2022-05-241-0/+33
* Add memory_bmux2rom pass.Marcelina Kościelnicka2022-05-181-0/+27
* Add memory_libmap tests.Marcelina Kościelnicka2022-05-1821-0/+1499
* efinix: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-181-12/+1
* ice40: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-181-56/+0
* xilinx: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-183-46/+15
* nexus: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-181-2/+2
* ecp5: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-181-135/+18
* proc_rom: Add special handling of const-0 address bits.Marcelina Kościelnicka2022-05-181-0/+146
* Merge pull request #3314 from jix/sva_value_change_logic_wideJannis Harder2022-05-162-2/+43
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| * verific: Use new value change logic also for $stable of wide signals.Jannis Harder2022-05-112-2/+43
* | Add proc_rom pass.Marcelina Kościelnicka2022-05-131-0/+43
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* Merge pull request #3305 from jix/sva_value_change_logicJannis Harder2022-05-097-1/+96
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| * verific: Improve logic generated for SVA value change expressionsJannis Harder2022-05-097-1/+96
* | Merge pull request #3297 from jix/sva_nested_clk_elseJannis Harder2022-05-091-0/+11
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| * verific: Fix conditions of SVAs with explicit clocks within proceduresJannis Harder2022-05-031-0/+11
* | Fix running sva testsMiodrag Milanovic2022-05-091-4/+3
* | opt_mem: Remove constant-value bit lanes.Marcelina Kościelnicka2022-05-072-15/+2
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* sv: fix always_comb auto nosync for nested and function blocksZachary Snow2022-04-052-0/+30
* opt_merge: Add `-keepdc` option required for formal verificationJannis Harder2022-04-011-0/+50
* Fix valgrind tests when using verificMiodrag Milanovic2022-03-304-8/+8
* Proper example codeMiodrag Milanovic2022-03-142-1/+3
* intel_alm: M10K write-enable is negative-trueLofty2022-03-091-1/+2
* Merge pull request #3207 from nakengelhardt/json_escape_quotesMiodrag Milanović2022-03-042-0/+15
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| * fix handling of escaped chars in json backend and frontendN. Engelhardt2022-02-182-0/+15
* | test dlatchsr and adlatchMiodrag Milanovic2022-02-164-4/+94
* | Added test casesMiodrag Milanovic2022-02-1638-0/+896
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* verilog: support for time scale delay valuesZachary Snow2022-02-141-0/+25
* Fix access to whole sub-structs (#3086)Kamil Rakoczy2022-02-144-5/+51
* verilog: fix dynamic dynamic range asgn elabZachary Snow2022-02-112-0/+108
* verilog: fix const func eval with upto variablesZachary Snow2022-02-112-0/+84
* gowin: Fix LUT RAM inference, add more models.Marcelina Kościelnicka2022-02-091-3/+2
* Merge pull request #3185 from YosysHQ/micko/co_simMiodrag Milanović2022-02-077-0/+953
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| * bug fix and cleanupsMiodrag Milanovic2022-02-041-2/+2
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