| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Disable RAM16X1D test | Eddie Hung | 2019-12-13 | 1 | -17/+17 |
| * | Remove extraneous synth_xilinx call | Eddie Hung | 2019-12-12 | 1 | -2/+0 |
| * | Add tests for these new models | Eddie Hung | 2019-12-12 | 1 | -0/+40 |
| * | Add #1460 testcase | Eddie Hung | 2019-12-12 | 1 | -0/+34 |
| * | Rename memory tests to lutram, add more xilinx tests | Eddie Hung | 2019-12-12 | 2 | -17/+99 |
| * | tests: arch: xilinx: Change order of arguments in macc.sh | Jan Kowalewski | 2019-12-06 | 1 | -1/+1 |
| * | No need for -abc9 | Eddie Hung | 2019-11-26 | 1 | -1/+1 |
| * | Add citation | Eddie Hung | 2019-11-26 | 1 | -0/+1 |
| * | Add testcase derived from fastfir_dynamictaps benchmark | Eddie Hung | 2019-11-26 | 1 | -0/+68 |
| * | xilinx: Use INV instead of LUT1 when applicable | Marcin Kościelnicki | 2019-11-25 | 4 | -8/+8 |
| * | Fixed tests | Miodrag Milanovic | 2019-11-11 | 1 | -1/+5 |
| * | Common memory test now shared | Miodrag Milanovic | 2019-10-18 | 2 | -22/+1 |
| * | Share common tests | Miodrag Milanovic | 2019-10-18 | 22 | -300/+11 |
| * | fix yosys path | Miodrag Milanovic | 2019-10-18 | 1 | -2/+2 |
| * | Fix path to yosys | Miodrag Milanovic | 2019-10-18 | 1 | -1/+1 |
| * | Moved all tests in arch sub directory | Miodrag Milanovic | 2019-10-18 | 36 | -0/+1034 |
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index : iCE40/yosys | |
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