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author | Eddie Hung <eddie@fpgeh.com> | 2019-11-26 23:08:14 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-11-26 23:08:14 -0800 |
commit | de3476cc233c1c78d3e956aa7e9bd1003ac37f66 (patch) | |
tree | 875870876f45de4f8b133b62f677c647cd4c67bf /tests/arch/xilinx | |
parent | 4a0198128eb966d00c24bd6938625892e7fd4b95 (diff) | |
download | yosys-de3476cc233c1c78d3e956aa7e9bd1003ac37f66.tar.gz yosys-de3476cc233c1c78d3e956aa7e9bd1003ac37f66.tar.bz2 yosys-de3476cc233c1c78d3e956aa7e9bd1003ac37f66.zip |
No need for -abc9
Diffstat (limited to 'tests/arch/xilinx')
-rw-r--r-- | tests/arch/xilinx/dsp_fastfir.ys | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/arch/xilinx/dsp_fastfir.ys b/tests/arch/xilinx/dsp_fastfir.ys index b205d42c1..0067a822b 100644 --- a/tests/arch/xilinx/dsp_fastfir.ys +++ b/tests/arch/xilinx/dsp_fastfir.ys @@ -63,7 +63,7 @@ module fastfir_dynamictaps(i_clk, i_reset, i_tap_wr, i_tap, i_ce, i_sample, o_re endmodule EOT -synth_xilinx -abc9 +synth_xilinx cd fastfir_dynamictaps select -assert-count 2 t:DSP48E1 select -assert-none t:* t:DSP48E1 %d t:BUFG %d |