aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs
Commit message (Expand)AuthorAgeFilesLines
* intel_alm: Add multiply signedness to cellsDan Ravensloft2020-08-265-10/+103
* synth_intel: Remove incomplete Arria 10 GX support.Marcelina Kościelnicka2020-08-215-192/+4
* intel: move Cyclone V support to intel_almDan Ravensloft2020-08-207-203/+11
* Merge pull request #2347 from YosysHQ/mwk/techmap-shift-fixesclairexen2020-08-201-67/+35
|\
| * techmap/shift_shiftx: Remove the "shiftx2mux" special path.Marcelina Kościelnicka2020-08-201-67/+35
* | Merge pull request #2319 from YosysHQ/mwk/techmap-celltype-patternclairexen2020-08-202-4/+4
|\ \ | |/ |/|
| * techmap: Add support for [] wildcards in techmap_celltype.Marcelina Kościelnicka2020-08-022-4/+4
* | Respect \A_SIGNED for $shiftXiretza2020-08-182-6/+16
* | intel_alm: fix typo in MISTRAL_MUL27X27 cell nameDan Ravensloft2020-08-131-1/+1
* | intel_alm: add more megafunctions. NFC.Dan Ravensloft2020-08-121-0/+431
* | Replace opt_rmdff with opt_dff.Marcelina Kościelnicka2020-08-077-29/+26
|/
* opt_expr: Remove -clkinv option, make it the default.Marcelina Kościelnicka2020-07-312-2/+2
* synth_ice40: Use opt_dff.Marcelina Kościelnicka2020-07-304-142/+6
* synth_xilinx: Use opt_dff.Marcelina Kościelnicka2020-07-301-17/+12
* intel_alm: direct M10K instantiationDan Ravensloft2020-07-277-39/+127
* intel_alm: increase abc9 -WDan Ravensloft2020-07-261-1/+1
* Merge pull request #2294 from Ravenslofty/intel_alm_timingsclairexen2020-07-234-72/+91
|\
| * intel_alm: add additional ABC9 timingsDan Ravensloft2020-07-234-72/+91
* | Remove EXPLICIT_CARRY logic.Keith Rothman2020-07-233-150/+2
|/
* sf2: Emit CLKINT even if -clkbuf not passedMarcelina Kościelnicka2020-07-171-2/+6
* Merge pull request #2274 from YosysHQ/mwk/anlogic-ff-fixMiodrag Milanović2020-07-171-12/+12
|\
| * anlogic: Fix FF mapping.Marcelina Kościelnicka2020-07-171-12/+12
* | Merge pull request #2229 from Ravenslofty/sf2_remove_sf2_iobsclairexen2020-07-164-214/+135
|\ \ | |/ |/|
| * sf2: replace sf2_iobs with {clkbuf,iopad}mapDan Ravensloft2020-07-094-214/+135
* | Merge pull request #2238 from YosysHQ/mwk/dfflegalize-anlogicMiodrag Milanović2020-07-163-50/+35
|\ \
| * | anlogic: Use dfflegalize.Marcelina Kościelnicka2020-07-143-50/+35
| |/
* | Merge pull request #2226 from YosysHQ/mwk/nuke-efinix-gbufMiodrag Milanović2020-07-165-122/+11
|\ \
| * | efinix: Nuke efinix_gbuf in favor of clkbufmap.Marcelina Kościelnicka2020-07-045-122/+11
* | | achronix: Use dfflegalize.Marcelina Kościelnicka2020-07-141-1/+1
* | | intel: Use dfflegalize.Marcelina Kościelnicka2020-07-138-178/+17
* | | Revert "intel_alm: direct M10K instantiation"Lofty2020-07-137-122/+38
* | | xilinx: Fix srl regression.Marcelina Kościelnicka2020-07-121-2/+2
* | | sf2: Use dfflegalize.Marcelina Kościelnicka2020-07-092-44/+13
* | | xilinx: Use dfflegalize.Marcelina Kościelnicka2020-07-096-484/+131
* | | efinix: Use dfflegalize.Marcelina Kościelnicka2020-07-062-15/+53
* | | gowin: Use dfflegalize.Marcelina Kościelnicka2020-07-062-145/+41
* | | intel_alm: direct M10K instantiationDan Ravensloft2020-07-057-38/+122
* | | synth_gowin: ABC9 supportDan Ravensloft2020-07-052-34/+340
* | | Merge pull request #2236 from YosysHQ/mwk/dfflegalize-ice40Marcelina Kościelnicka2020-07-054-208/+24
|\ \ \
| * | | ice40: Use dfflegalize.Marcelina Kościelnicka2020-07-054-208/+24
* | | | ecp5: Use dfflegalize.Marcelina Kościelnicka2020-07-054-254/+96
* | | | Merge pull request #2232 from YosysHQ/mwk/gowin-sim-initMarcelina Kościelnicka2020-07-051-8/+8
|\ \ \ \
| * | | | gowin: Fix INIT values in sim library.Marcelina Kościelnicka2020-07-051-8/+8
| | |/ / | |/| |
* | | | intel_alm: DSP inferenceDan Ravensloft2020-07-056-9/+186
| |/ / |/| |
* | | gowin: replace determine_init with setundefDan Ravensloft2020-07-043-74/+1
* | | synth_intel_alm: Use dfflegalize.Marcelina Kościelnicka2020-07-042-121/+9
|/ /
* | Improve MISTRAL_FF specify rulesDan Ravensloft2020-07-041-5/+4
* | intel_alm: compose $__MISTRAL_FF_SYNCONLY from MISTRAL_FFEddie Hung2020-07-042-47/+2
* | intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLYEddie Hung2020-07-044-4/+4
* | intel_alm: ABC9 sequential optimisationsDan Ravensloft2020-07-047-19/+149
|/