aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs
Commit message (Expand)AuthorAgeFilesLines
...
| * | | ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port mapSylvain Munaut2019-07-162-4/+4
| | |/ | |/|
* / | gen_lut to return correctly sized LUT maskEddie Hung2019-07-161-1/+1
|/ /
* | Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fixEddie Hung2019-07-168-29/+120
|\ \ | |/ |/|
| * $__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequarkEddie Hung2019-07-157-8/+8
| * ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUTEddie Hung2019-07-131-9/+7
| * Use Const::from_string() not its constructor...Eddie Hung2019-07-121-1/+1
| * Off by oneEddie Hung2019-07-121-1/+1
| * Fix spacingEddie Hung2019-07-121-1/+1
| * Remove double pushEddie Hung2019-07-121-1/+0
| * Map to and from this box if -abc9Eddie Hung2019-07-121-2/+3
| * ice40_opt to handle this box and opt back to SB_LUT4Eddie Hung2019-07-121-0/+48
| * Add new box to cells_sim.vEddie Hung2019-07-121-2/+25
| * _ABC macro will map and unmap to this new boxEddie Hung2019-07-122-0/+34
| * Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 boxEddie Hung2019-07-123-25/+13
* | Merge pull request #1183 from whitequark/ice40-always-relutClifford Wolf2019-07-121-11/+5
|\ \ | |/ |/|
| * synth_ice40: switch -relut to be always on.whitequark2019-07-111-10/+4
| * synth_ice40: fix help text typo. NFC.whitequark2019-07-111-1/+1
* | Merge pull request #1182 from koriakin/xc6s-bramEddie Hung2019-07-119-8/+598
|\ \
| * | synth_xilinx: Initial Spartan 6 block RAM inference support.Marcin Kościelnicki2019-07-119-8/+598
| |/
* / xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Viv...Marcin Kościelnicki2019-07-112-6/+6
|/
* Merge pull request #1180 from YosysHQ/eddie/no_abc9_retimeEddie Hung2019-07-103-6/+15
|\
| * Error out if -abc9 and -retime specifiedEddie Hung2019-07-103-6/+15
* | Merge pull request #1148 from YosysHQ/xc7muxEddie Hung2019-07-106-49/+414
|\ \ | |/ |/|
| * Add some spacingEddie Hung2019-07-101-9/+9
| * Add some ASCII art explaining mux decompositionEddie Hung2019-07-101-0/+21
| * Call muxpack and pmux2shiftx before cmp2lutEddie Hung2019-07-091-9/+12
| * Restore opt_clean back to original placeEddie Hung2019-07-091-2/+1
| * Restore missing techmap -map +/cmp2lut.v with LUT_WIDTH=6Eddie Hung2019-07-091-0/+2
| * Extend using A[1] to preserve don't careEddie Hung2019-07-091-1/+9
| * Extend during mux decomposition with 1'bxEddie Hung2019-07-091-24/+3
| * Fix typo and commentsEddie Hung2019-07-091-4/+4
| * Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-07-092-19/+28
| |\
| * | synth_xilinx to call commands of synth -coarse directlyEddie Hung2019-07-091-3/+20
| * | Revert "synth_xilinx to call "synth -run coarse" with "-keepdc""Eddie Hung2019-07-091-2/+2
| * | Fix spacingEddie Hung2019-07-091-1/+1
| * | Fix spacingEddie Hung2019-07-091-1/+1
| * | Decompose mux inputs in delay-orientated (rather than area) fashionEddie Hung2019-07-081-18/+30
| * | Do not call opt -mux_undef (part of -full) before muxcoverEddie Hung2019-07-081-1/+5
| * | Add one more commentEddie Hung2019-07-081-0/+3
| * | Less thinkingEddie Hung2019-07-081-3/+3
| * | RewordEddie Hung2019-07-081-2/+2
| * | synth_xilinx to call "synth -run coarse" with "-keepdc"Eddie Hung2019-07-081-2/+2
| * | Merge remote-tracking branch 'origin/eddie/synth_keepdc' into xc7muxEddie Hung2019-07-081-2/+13
| |\ \
| * | | Map $__XILINX_SHIFTX in a more balanced mannerEddie Hung2019-07-081-36/+49
| * | | CapitalisationEddie Hung2019-07-081-1/+1
| * | | Add synth_xilinx -widemux recommended valueEddie Hung2019-07-081-1/+1
| * | | Fixes for 2:1 muxesEddie Hung2019-07-082-5/+30
| * | | synth_xilinx -widemux=2 is minimum nowEddie Hung2019-07-081-4/+7
| * | | Parametric muxcover costs as per @daveshah1Eddie Hung2019-07-081-16/+14
| * | | atoi -> stoi as per @daveshah1Eddie Hung2019-07-081-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-12 03:52:09 +0000