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path: root/techlibs/intel_alm/common/dsp_sim.v
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* intel_alm: Add multiply signedness to cellsDan Ravensloft2020-08-261-3/+48
* intel_alm: fix typo in MISTRAL_MUL27X27 cell nameDan Ravensloft2020-08-131-1/+1
* intel_alm: add additional ABC9 timingsDan Ravensloft2020-07-231-6/+9
* intel_alm: DSP inferenceDan Ravensloft2020-07-051-0/+35