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* intel_alm: Fix illegal carry chainsgatecat2021-05-152-3/+5
* intel_alm: Add global buffer insertiongatecat2021-05-155-3/+67
* intel_alm: Add IO buffer insertiongatecat2021-05-153-0/+91
* intel_alm: Add multiply signedness to cellsDan Ravensloft2020-08-264-6/+99
* intel_alm: fix typo in MISTRAL_MUL27X27 cell nameDan Ravensloft2020-08-131-1/+1
* intel_alm: add more megafunctions. NFC.Dan Ravensloft2020-08-121-0/+431
* intel_alm: direct M10K instantiationDan Ravensloft2020-07-275-35/+122
* intel_alm: add additional ABC9 timingsDan Ravensloft2020-07-234-72/+91
* Revert "intel_alm: direct M10K instantiation"Lofty2020-07-135-117/+34
* intel_alm: direct M10K instantiationDan Ravensloft2020-07-055-34/+117
* intel_alm: DSP inferenceDan Ravensloft2020-07-054-0/+135
* synth_intel_alm: Use dfflegalize.Marcelina Koƛcielnicka2020-07-041-117/+6
* Improve MISTRAL_FF specify rulesDan Ravensloft2020-07-041-5/+4
* intel_alm: compose $__MISTRAL_FF_SYNCONLY from MISTRAL_FFEddie Hung2020-07-042-47/+2
* intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLYEddie Hung2020-07-043-3/+3
* intel_alm: ABC9 sequential optimisationsDan Ravensloft2020-07-045-10/+126
* Add force_downto and force_upto wire attributes.Marcelina Koƛcielnicka2020-05-192-0/+8
* intel_alm: direct LUTRAM cell instantiationDan Ravensloft2020-05-076-50/+141
* intel_alm: cleanup duplicationDan Ravensloft2020-04-241-0/+63
* intel_alm: Documentation improvementsDan Ravensloft2020-04-213-14/+127
* synth_intel_alm: VQM supportDan Ravensloft2020-04-151-6/+2
* synth_intel_alm: alternative synthesis for Intel FPGAsDan Ravensloft2020-04-1513-0/+1082