Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Fix files with CRLF line endings | Claire Xenia Wolf | 2021-06-09 | 1 | -31/+31 |
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* | synth_intel_alm: alternative synthesis for Intel FPGAs | Dan Ravensloft | 2020-04-15 | 1 | -0/+31 |
By operating at a layer of abstraction over the rather clumsy Intel primitives, we can avoid special hacks like `dffinit -highlow` in favour of simple techmapping. This also makes the primitives much easier to manipulate, and more descriptive (no more cyclonev_lcell_comb to mean anything from a LUT2 to a LUT6). |