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ice40
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Author
Age
Files
Lines
*
ice40: Fix test_dsp_model.sh
David Shah
2019-07-19
1
-1
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+1
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ice40/cells_sim.v: Fix sign of J and K partial products
David Shah
2019-07-19
1
-5
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+7
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ice40/cells_sim.v: LSB of A/B only signed in 8x8 mode
David Shah
2019-07-19
1
-2
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+2
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Add tests for all combinations of A and B signedness for comb mul
Eddie Hung
2019-07-19
2
-1
/
+229
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Don't copy ref if exists already
Eddie Hung
2019-07-19
1
-1
/
+3
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Merge pull request #1184 from whitequark/synth-better-labels
Clifford Wolf
2019-07-18
1
-2
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+2
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synth_{ice40,ecp5}: more sensible pass label naming.
whitequark
2019-07-16
1
-2
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+2
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ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map
Sylvain Munaut
2019-07-16
2
-4
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+4
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Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix
Eddie Hung
2019-07-16
8
-29
/
+120
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$__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequark
Eddie Hung
2019-07-15
7
-8
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+8
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ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT
Eddie Hung
2019-07-13
1
-9
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+7
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Use Const::from_string() not its constructor...
Eddie Hung
2019-07-12
1
-1
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+1
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Off by one
Eddie Hung
2019-07-12
1
-1
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+1
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*
Fix spacing
Eddie Hung
2019-07-12
1
-1
/
+1
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*
Remove double push
Eddie Hung
2019-07-12
1
-1
/
+0
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Map to and from this box if -abc9
Eddie Hung
2019-07-12
1
-2
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+3
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ice40_opt to handle this box and opt back to SB_LUT4
Eddie Hung
2019-07-12
1
-0
/
+48
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Add new box to cells_sim.v
Eddie Hung
2019-07-12
1
-2
/
+25
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_ABC macro will map and unmap to this new box
Eddie Hung
2019-07-12
2
-0
/
+34
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Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 box
Eddie Hung
2019-07-12
3
-25
/
+13
*
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synth_ice40: switch -relut to be always on.
whitequark
2019-07-11
1
-10
/
+4
*
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synth_ice40: fix help text typo. NFC.
whitequark
2019-07-11
1
-1
/
+1
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Error out if -abc9 and -retime specified
Eddie Hung
2019-07-10
1
-1
/
+4
*
Update synth_ice40 -device doc to be relevant for -abc9 only
Eddie Hung
2019-06-28
1
-2
/
+2
*
Extraneous newline
Eddie Hung
2019-06-27
1
-1
/
+0
*
Remove noise from ice40/cells_sim.v
Eddie Hung
2019-06-27
1
-5
/
+0
*
Refactor for one "abc_carry" attribute on module
Eddie Hung
2019-06-27
1
-2
/
+2
*
abc9: Add wire delays to synth_ice40
David Shah
2019-06-26
1
-2
/
+10
*
Fix and cleanup ice40 boxes for carry in/out
Eddie Hung
2019-06-22
4
-313
/
+25
*
Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung
2019-06-20
1
-1
/
+1
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*
Fixed small typo in ice40_unlut help summary
acw1251
2019-06-19
1
-1
/
+1
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Fixed the help summary line for a few commands
acw1251
2019-06-19
1
-1
/
+1
*
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Resolve comments from @daveshah1
Eddie Hung
2019-06-14
1
-1
/
+1
*
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Remove WIP ABC9 flop support
Eddie Hung
2019-06-14
1
-25
/
+25
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Make doc consistent
Eddie Hung
2019-06-14
1
-1
/
+1
*
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Fix LP SB_LUT4 timing
Eddie Hung
2019-06-13
1
-1
/
+1
*
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Remove abc_flop{,_d} attributes from ice40/cells_sim.v
Eddie Hung
2019-06-12
1
-40
/
+20
*
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Merge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung
2019-06-10
1
-0
/
+24
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ice40/cells_sim.v: Add support for RGB_DRV/LED_DRV_CUR for u4k
Simon Schubert
2019-06-10
1
-0
/
+24
*
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Make SB_LUT4 a whitebox, SB_DFF a blackbox (for now)
Eddie Hung
2019-06-03
4
-8
/
+8
*
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Ooopsie
Eddie Hung
2019-06-03
1
-1
/
+1
*
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Consistent with xilinx
Eddie Hung
2019-06-03
3
-4
/
+4
*
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Merge branch 'xaig' into xc7mux
Eddie Hung
2019-05-31
1
-1
/
+1
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Use nonblocking
Eddie Hung
2019-04-23
1
-1
/
+1
*
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Merge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung
2019-05-21
1
-0
/
+11
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ice40/cells_sim.v: Add support for TRIM input to SB_HFOSC
Sylvain Munaut
2019-05-13
1
-0
/
+11
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Merge pull request #969 from YosysHQ/clifford/pmgenstuff
Clifford Wolf
2019-05-03
1
-0
/
+2
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Merge remote-tracking branch 'origin/clifford/pmgenstuff' into xc7mux
Eddie Hung
2019-05-02
1
-0
/
+2
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Run "peepopt" in generic "synth" pass and "synth_ice40"
Clifford Wolf
2019-04-30
1
-0
/
+2
*
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Merge remote-tracking branch 'origin/master' into xc7mux
Eddie Hung
2019-05-02
1
-4
/
+6
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