| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ice40: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 1 | -312/+212 |
| * | verilog: significant block scoping improvements | Zachary Snow | 2021-01-31 | 1 | -33/+40 |
| * | ice40: use 2 bits for READ/WRITE MODE for SB_RAM map | Elms | 2019-02-28 | 1 | -2/+2 |
| * | Fixed WE/RE usage in iCE40 BRAM mapping | Clifford Wolf | 2015-11-24 | 1 | -8/+8 |
| * | Added read-enable to memory model | Clifford Wolf | 2015-09-25 | 1 | -4/+6 |
| * | Fixed ice40 handling of negclk RAM40 | Clifford Wolf | 2015-09-10 | 1 | -4/+4 |
| * | Initialization support for all iCE40 bram modes | Clifford Wolf | 2015-04-26 | 1 | -16/+21 |
| * | initialized iCE40 brams (mode 0) | Clifford Wolf | 2015-04-25 | 1 | -48/+238 |
| * | More iCE40 bram improvements | Clifford Wolf | 2015-04-25 | 1 | -6/+4 |
| * | iCE40 bram progress | Clifford Wolf | 2015-04-24 | 1 | -11/+28 |
| * | iCE40 bram tests and fixes | Clifford Wolf | 2015-04-24 | 1 | -8/+8 |
| * | Added ice40 bram support | Clifford Wolf | 2015-04-24 | 1 | -0/+99 |
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index : iCE40/yosys | |
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