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* gowin: Add serialization/deserialization primitivesYRabbit2023-04-121-0/+244
* Merge pull request #3663 from uis246/masterMiodrag Milanović2023-02-281-0/+17
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| * gowin: Add new types of oscillatoruis2023-02-061-0/+17
* | gowin: Add support for emulated differential outputmartell2023-01-291-0/+8
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* gowin: add a new type of PLL - PLLVRYRabbit2023-01-111-0/+47
* Apicula now supports lutramPepijn de Vos2022-07-031-1/+0
* Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.Marcelina Kościelnicka2022-06-021-2/+18
* gowin: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-189-266/+576
* gowin: Add oscillator primitivesTim Pambor2022-03-281-0/+34
* gowin: add support for Double Data Rate primitivesYRabbit2022-03-141-0/+25
* gowin: Remove unnecessary attributesYRabbit2022-02-241-5/+0
* gowin: Add support for true differential outputYRabbit2022-02-241-0/+11
* gowin: Add remaining block RAM blackboxes.Marcelina Kościelnicka2022-02-121-72/+527
* gowin: Fix LUT RAM inference, add more models.Marcelina Kościelnicka2022-02-092-41/+241
* iopadmap: Add native support for negative-polarity output enable.Marcelina Kościelnicka2021-11-092-9/+1
* synth_gowin: move splitnets to after iopadmap (#2435)Pepijn de Vos2021-11-071-2/+3
* Remove noalu from synth_gowin json output as Apicula now supports itPepijn de Vos2021-11-071-1/+0
* gowin: widelut support (#3042)Pepijn de Vos2021-11-061-1/+0
* Gowin: deal with active-low tristate (#2971)Pepijn de Vos2021-08-203-5/+12
* Use HTTPS for website links, gatecat emailClaire Xenia Wolf2021-06-091-1/+1
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-082-2/+2
* Blackbox all whiteboxes after synthesisgatecat2021-03-171-0/+1
* add -noalu and -json option for apiculaPepijn de Vos2020-11-301-3/+32
* synth_gowin: Add rPLL blackboxKonrad Beckmann2020-11-111-0/+45
* Replace opt_rmdff with opt_dff.Marcelina Kościelnicka2020-08-071-4/+4
* gowin: Use dfflegalize.Marcelina Kościelnicka2020-07-062-145/+41
* synth_gowin: ABC9 supportDan Ravensloft2020-07-052-34/+340
* Merge pull request #2232 from YosysHQ/mwk/gowin-sim-initMarcelina Kościelnicka2020-07-051-8/+8
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| * gowin: Fix INIT values in sim library.Marcelina Kościelnicka2020-07-051-8/+8
* | gowin: replace determine_init with setundefDan Ravensloft2020-07-043-74/+1
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* Update dff2dffe, dff2dffs, zinit to new FF types.Marcelina Kościelnicka2020-06-232-25/+25
* Use C++11 final/override keywords.whitequark2020-06-182-6/+6
* Add force_downto and force_upto wire attributes.Marcelina Kościelnicka2020-05-192-0/+9
* gowin,ecp5: remove generated files in `make clean`.whitequark2020-04-241-2/+1
* Get rid of dffsr2dff.Marcelina Kościelnicka2020-04-151-1/+0
* kernel: big fat patch to use more ID::*, otherwise ID(*)Eddie Hung2020-04-021-5/+5
* Removing cells_sim.v from bram techmap passDiego H2020-02-061-1/+1
* synth_*: call 'opt -fast' after 'techmap'Eddie Hung2020-02-051-1/+1
* Add opt_lut_ins pass. (#1673)Marcelina Kościelnicka2020-02-031-0/+1
* Merge pull request #1604 from whitequark/unify-ram-namingwhitequark2020-01-025-15/+18
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| * Harmonize BRAM/LUTRAM descriptions across all of Yosys.whitequark2020-01-015-15/+18
* | Disable synth_gowin -abc9 as it offers no advantages yetEddie Hung2019-12-301-12/+12
* | Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well""Eddie Hung2019-12-301-1/+1
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* Use -match-init to not synth contradicting init valuesPepijn de Vos2019-12-031-1/+1
* attempt to fix formattingPepijn de Vos2019-11-251-154/+154
* gowin: add and test dff init valuesPepijn de Vos2019-11-252-41/+199
* gowin: Add missing .gitignore entriesMarcin Kościelnicki2019-11-221-0/+2
* Remove dff init altogetherPepijn de Vos2019-11-192-3/+3
* add help for nowidelut and abc9 optionsPepijn de Vos2019-11-181-1/+7
* fix fsm test with proper clock enable polarityPepijn de Vos2019-11-111-4/+4
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