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* Add opt_lut_ins pass. (#1673)Marcelina Kościelnicka2020-02-031-0/+1
* xilinx/ice40/ecp5: undo permuting LUT masks in lut_mapEddie Hung2020-01-271-77/+55
* Merge remote-tracking branch 'origin/master' into eddie/abc9_mfsEddie Hung2020-01-074-35/+31
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| * Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-064-4/+4
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| * \ Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-021-2/+2
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| * | | Missing characterEddie Hung2019-12-311-1/+1
| * | | Cleanup ecp5 boxesEddie Hung2019-12-314-35/+31
* | | | Re-enable &mfs for synth_{ecp5,xilinx}Eddie Hung2020-01-061-2/+2
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* | | Merge pull request #1604 from whitequark/unify-ram-namingwhitequark2020-01-024-4/+4
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| * | Harmonize BRAM/LUTRAM descriptions across all of Yosys.whitequark2020-01-014-4/+4
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* | Update doc that "-retime" calls abc with "-dff -D 1"Eddie Hung2019-12-301-1/+1
* | Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well""Eddie Hung2019-12-301-1/+1
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* Nitpick cleanup for ecp5Eddie Hung2019-12-272-11/+3
* Revert "Optimise write_xaiger"Eddie Hung2019-12-201-5/+0
* Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanupEddie Hung2019-12-191-0/+5
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| * techmap/aigmap of whiteboxes to occur before abc9 instead of in write_xaigerEddie Hung2019-12-061-0/+5
* | Merge pull request #1563 from YosysHQ/dave/async-prldDavid Shah2019-12-182-4/+28
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| * | ecp5: Add support for mapping PRLD FFsDavid Shah2019-12-072-4/+28
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* / Fix bitwidth mismatch; suppresses iverilog warningEddie Hung2019-12-111-4/+4
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* ecp5: Use new autoname pass for better cell/net namesDavid Shah2019-11-151-0/+1
* ecp5: Pass -nomfs to abc9David Shah2019-10-201-2/+2
* Makefile: don't assume python is called `python3`Sean Cross2019-10-191-2/+2
* ecp5: Add ECLKBRIDGECS blackboxDavid Shah2019-10-111-0/+7
* ecp5: Add attrmvcp to copy syn_useioff to driving FFDavid Shah2019-10-101-0/+1
* ecp5: Set syn_useioff on IO FFs to enable packingDavid Shah2019-10-101-8/+8
* Rename abc_* names/attributes to more precisely be abc9_*Eddie Hung2019-10-0410-25/+25
* Panic over. Model was elsewhere. Re-arrange for consistencyEddie Hung2019-10-041-0/+1
* ecp5: Fix shuffle_enable portDavid Shah2019-10-011-2/+2
* ecp5: Add support for mapping 36-bit wide PDP BRAMsDavid Shah2019-10-016-1/+183
* Combine 'flatten' & 'coarse' labels in synth_ecp5 so proc run onceEddie Hung2019-09-261-9/+4
* Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-057-14/+53
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| * Rename boxEddie Hung2019-09-021-1/+1
| * Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-09-022-7/+8
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| * \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-307-106/+147
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| * \ \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-286-54/+212
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| * | | | Fix spacingEddie Hung2019-08-231-1/+1
| * | | | Remove unused modelEddie Hung2019-08-231-13/+0
| * | | | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-231-3/+6
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| * | | | | ecp5: remove DPR16X4 from abc_unmap.vEddie Hung2019-08-201-20/+0
| * | | | | ecp5 to use -max_iter 1Eddie Hung2019-08-203-4/+3
| * | | | | ecp5 to use abc_map.v and _unmap.vEddie Hung2019-08-207-14/+89
* | | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-042-7/+8
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| * | | | | Fix TRELLIS_FF simulation modelMiodrag Milanovic2019-08-311-6/+7
| * | | | | ecp5_gsr: Fix typoDavid Shah2019-08-311-1/+1
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* | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-307-106/+147
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| * | | | ecp5: Add simulation equivalence check for Diamond FF implementationsDavid Shah2019-08-303-0/+87
| * | | | ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.whitequark2019-08-305-95/+60
| * | | | ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives.whitequark2019-08-301-35/+20
| * | | | ecp5: add missing FD primitives.whitequark2019-08-302-72/+76
| * | | | ecp5: fix CEMUX on IFS/OFS primitives.whitequark2019-08-302-18/+18
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