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author | Eddie Hung <eddie@fpgeh.com> | 2019-12-06 17:05:02 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-06 17:05:02 -0800 |
commit | 98c9ea605b5cb2eb540ae5b804a18f8921f0bc46 (patch) | |
tree | 60e4232c602402b618390ac232323ab45d607cbe /techlibs/ecp5 | |
parent | 7dece7955e9682dddec67eb99d4f99742e637a07 (diff) | |
download | yosys-98c9ea605b5cb2eb540ae5b804a18f8921f0bc46.tar.gz yosys-98c9ea605b5cb2eb540ae5b804a18f8921f0bc46.tar.bz2 yosys-98c9ea605b5cb2eb540ae5b804a18f8921f0bc46.zip |
techmap/aigmap of whiteboxes to occur before abc9 instead of in write_xaiger
Diffstat (limited to 'techlibs/ecp5')
-rw-r--r-- | techlibs/ecp5/synth_ecp5.cc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/techlibs/ecp5/synth_ecp5.cc b/techlibs/ecp5/synth_ecp5.cc index 4cbb56ea1..b099c25d3 100644 --- a/techlibs/ecp5/synth_ecp5.cc +++ b/techlibs/ecp5/synth_ecp5.cc @@ -312,6 +312,11 @@ struct SynthEcp5Pass : public ScriptPass run("techmap " + techmap_args); if (abc9) { + run("select -set abc9_boxes A:abc9_box_id A:whitebox=1"); + run("wbflip @abc9_boxes"); + run("techmap -autoproc @abc9_boxes"); + run("aigmap @abc9_boxes"); + run("wbflip @abc9_boxes"); run("read_verilog -icells -lib +/ecp5/abc9_model.v"); if (nowidelut) run("abc9 -lut +/ecp5/abc9_5g_nowide.lut -box +/ecp5/abc9_5g.box -W 200 -nomfs"); |