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* Fixed submod for non-primitive cellsClifford Wolf2013-12-021-0/+1
* Fixed submod for non-cleaned designsClifford Wolf2013-12-021-1/+4
* A fix in memory_dff for write ports with static addressesClifford Wolf2013-12-011-10/+10
* Progress on AppNote 011Clifford Wolf2013-11-291-0/+4
* Added pattern support to "ls" commandClifford Wolf2013-11-281-30/+35
* Improved ID matching scheme in select (and thus for all commands)Clifford Wolf2013-11-281-2/+12
* Fixes and improvements in "show" commandClifford Wolf2013-11-281-10/+42
* Added "src" attribute to processesClifford Wolf2013-11-281-1/+4
* Added support for "show -pause" and "show -format dot"Clifford Wolf2013-11-281-6/+30
* Tighter integration of ABC buildClifford Wolf2013-11-271-0/+2
* Started implementing undef support in "sat" commandClifford Wolf2013-11-251-12/+103
* Bugfixes in new "stat" commandClifford Wolf2013-11-251-7/+1
* Added "stat" commandClifford Wolf2013-11-252-0/+219
* Improvements in satgen undef handlingClifford Wolf2013-11-251-14/+39
* Improvements in satgen undef handlingClifford Wolf2013-11-251-4/+20
* Started implementing undef handling in satgenClifford Wolf2013-11-251-9/+30
* Using simplemap mappers from techmapClifford Wolf2013-11-242-28/+64
* Added simplemap passClifford Wolf2013-11-242-0/+518
* Added module->avail_parameters (for advanced techmap features)Clifford Wolf2013-11-241-2/+8
* Added techmap -D and -I optionsClifford Wolf2013-11-241-2/+16
* Added "techmap -share_map" optionClifford Wolf2013-11-241-0/+9
* Remove auto_wire framework (smarter than the verilog standard)Clifford Wolf2013-11-241-60/+0
* Implemented correct handling of signed module parametersClifford Wolf2013-11-242-2/+2
* Fixed "flatten" top-module detection: Only use on fully selected designsClifford Wolf2013-11-241-3/+4
* Added "top" attribute to mark top module in hierarchyClifford Wolf2013-11-242-3/+43
* Improved handling of techmap special wiresClifford Wolf2013-11-231-1/+3
* Added more generic _TECHMAP_ wire mechanism to techmap passClifford Wolf2013-11-231-77/+185
* Renamed "placeholder" to "blackbox"Clifford Wolf2013-11-224-9/+9
* Updated abcClifford Wolf2013-11-211-10/+27
* Major improvements in mem2reg and added "init" sync rulesClifford Wolf2013-11-213-0/+117
* Fixed a bug in "add -global_input"Clifford Wolf2013-11-211-16/+17
* Added "proc_arst -global_arst" featureClifford Wolf2013-11-202-8/+81
* Added "add" command (only wires for now)Clifford Wolf2013-11-202-0/+155
* Renamed temp module generated by "abc" pass from "logic" to "netlist"Clifford Wolf2013-11-192-6/+6
* Fixed abc pass blif parser for constant bitsClifford Wolf2013-11-131-18/+57
* Cleanups and bugfixes in response to new internal cell checkerClifford Wolf2013-11-112-2/+3
* Call internal checker more oftenClifford Wolf2013-11-101-0/+2
* Improved user-friendliness of "sat" and "eval" expression parsingClifford Wolf2013-11-092-20/+16
* Added verification of SAT model to "eval -vloghammer_report" commandClifford Wolf2013-11-091-0/+43
* Fixed keep attribute on wires in opt_cleanClifford Wolf2013-11-081-1/+1
* Renamed extend_un0() to extend_u0() and use it in genrtlilClifford Wolf2013-11-071-2/+2
* Fixed type of sign extension in opt_const $eq/$ne handlingClifford Wolf2013-11-071-9/+9
* Fixed $eq/$ne bitwise optimization in opt_constClifford Wolf2013-11-071-7/+8
* Added handling of unconnected/unspecified signals to eval -vloghammer_reportClifford Wolf2013-11-061-2/+6
* Added correct RTL undef handling to eval vloghammer modeClifford Wolf2013-11-061-3/+17
* Added eval -vloghammer_report modeClifford Wolf2013-11-061-4/+142
* Added support for "keep" attributes on wiresClifford Wolf2013-11-051-0/+5
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2013-11-031-0/+57
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| * Added resolution of positional arguments to hierarchy passClifford Wolf2013-11-031-0/+57
* | Added placeholder check to dfflibmap and cleaned up some other placeholder ch...Clifford Wolf2013-10-312-3/+3
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