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* Use `emplace()` rather than `insert()`.Alberto Gonzalez2020-05-141-1/+1
* Clean up pseudo-private member usage and ensure range iteration uses referenc...Alberto Gonzalez2020-05-141-17/+17
* Clean up extraneous buffer.Alberto Gonzalez2020-05-141-5/+2
* Replace `std::map` with `dict` for `unique_bit_id`.Alberto Gonzalez2020-05-141-1/+1
* Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and `c...Alberto Gonzalez2020-05-141-3/+3
* Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outb...Alberto Gonzalez2020-05-141-3/+3
* Replace `std::map` with `dict` for `TechmapWires` type.Alberto Gonzalez2020-05-141-1/+1
* Replace `std::map` with `dict` for `celltypeMap`.Alberto Gonzalez2020-05-141-3/+3
* Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`.Alberto Gonzalez2020-05-141-4/+4
* Replace `std::map` with `dict` for `positional_ports`.Alberto Gonzalez2020-05-141-1/+1
* Add specialized `hash()` for type `dict` and use a `dict` instead of a `std::...Alberto Gonzalez2020-05-141-4/+4
* Replace `std::map` with `dict` for `simplemap_mappers`.Alberto Gonzalez2020-05-143-5/+5
* Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`.Alberto Gonzalez2020-05-141-10/+10
* Replace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techma...Alberto Gonzalez2020-05-141-21/+21
* Do not modify design modules while iterating over `modules()`.Alberto Gonzalez2020-05-141-1/+4
* Clean up pseudo-private member usage, superfluous `std::vector` instantiation...Alberto Gonzalez2020-05-141-76/+70
* Merge pull request #2014 from YosysHQ/claire/fixoptaluClaire Wolf2020-05-031-7/+19
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| * Fix the other "opt_expr -fine" bug introduced in 213a89558Claire Wolf2020-05-021-7/+19
* | abc9_ops: -reintegrate to be sensitive to start_offset tooEddie Hung2020-05-021-3/+5
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* Merge pull request #2010 from YosysHQ/claire/fixoptClaire Wolf2020-05-021-7/+19
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| * Fix "opt_expr -fine" bug introduced in 213a89558Claire Wolf2020-05-011-7/+19
* | Add WASI platform support.whitequark2020-04-307-9/+31
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* bugpoint: improve messagingEddie Hung2020-04-241-7/+7
* bugpoint: (* keep *) to (* bugpoint_keep *); also apply to modules/cellsEddie Hung2020-04-241-5/+14
* bugpoint: skip ports with (* keep *) on; add headerEddie Hung2020-04-241-9/+18
* bugpoint: improve help textEddie Hung2020-04-231-11/+13
* Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfsEddie Hung2020-04-231-2/+17
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| * abc9: tolerate ABC nonzero exit code if output.aig; write before &mfsEddie Hung2020-04-201-2/+13
| * xilinx/ecp5: disable abc9's "&mfs" optimisationEddie Hung2020-04-201-0/+4
* | Merge pull request #1989 from boqwxp/qbfsat_anyconst_sourcelocsClaire Wolf2020-04-231-5/+2
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| * | qbfsat: Make hole name recovery more robust. Allow multiple cell types to sha...Alberto Gonzalez2020-04-231-5/+2
* | | Merge pull request #1988 from boqwxp/qbfsatClaire Wolf2020-04-231-6/+22
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| * | | qbfsat: Add `-assume-negative-polarity` option.Alberto Gonzalez2020-04-231-6/+22
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* / / xilinx: xilinx_dsp_cascade to check CREG for DSP48E1 onlyEddie Hung2020-04-221-1/+1
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* | Merge pull request #1949 from YosysHQ/eddie/select_blackboxEddie Hung2020-04-221-9/+26
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| * | Update passes/cmds/select.ccClaire Wolf2020-04-221-2/+2
| * | select: do not select black/white boxes by default, '=' prefix to do soEddie Hung2020-04-221-5/+5
| * | Add '=' selection pattern prefix for non-blackbox only patternsClaire Wolf2020-04-211-12/+26
| * | select: do not select inside blackboxesEddie Hung2020-04-161-0/+3
* | | Cleanup use of hard-coded default parameters in light of #1945Eddie Hung2020-04-227-48/+48
* | | Merge pull request #1950 from YosysHQ/eddie/design_importEddie Hung2020-04-221-2/+8
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| * | | design: -import to not count black/white-boxes as candidates for topEddie Hung2020-04-161-2/+8
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* | | Merge pull request #1976 from YosysHQ/dave/fix-sim-constClaire Wolf2020-04-221-1/+5
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| * | | sim: Fix handling of constant-connected cell inputs at startupDavid Shah2020-04-211-1/+5
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* | | bugpoint: Don't remove modules or cells while iterating over them.Marcelina Kościelnicka2020-04-221-4/+14
* | | hierarchy: Convert positional parameters to named.Marcelina Kościelnicka2020-04-211-3/+27
* | | abc9: -prep_lut to be more robustEddie Hung2020-04-201-16/+33
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* | qbfsat: Fix illegal use of 'stdout' identifierDavid Shah2020-04-171-3/+3
* | Merge pull request #1864 from boqwxp/cleanup_techmap_abcwhitequark2020-04-171-99/+80
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| * | Simplify `passes/techmap/abc.cc` and remove superfluous `RTLIL::SigSpec` cons...Alberto Gonzalez2020-04-141-132/+49
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