iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Added simplemap pass	Clifford Wolf	2013-11-24	2	-0/+518
*	Added module->avail_parameters (for advanced techmap features)	Clifford Wolf	2013-11-24	1	-2/+8
*	Added techmap -D and -I options	Clifford Wolf	2013-11-24	1	-2/+16
*	Added "techmap -share_map" option	Clifford Wolf	2013-11-24	1	-0/+9
*	Remove auto_wire framework (smarter than the verilog standard)	Clifford Wolf	2013-11-24	1	-60/+0
*	Implemented correct handling of signed module parameters	Clifford Wolf	2013-11-24	2	-2/+2
*	Fixed "flatten" top-module detection: Only use on fully selected designs	Clifford Wolf	2013-11-24	1	-3/+4
*	Added "top" attribute to mark top module in hierarchy	Clifford Wolf	2013-11-24	2	-3/+43
*	Improved handling of techmap special wires	Clifford Wolf	2013-11-23	1	-1/+3
*	Added more generic _TECHMAP_ wire mechanism to techmap pass	Clifford Wolf	2013-11-23	1	-77/+185
*	Renamed "placeholder" to "blackbox"	Clifford Wolf	2013-11-22	4	-9/+9
*	Updated abc	Clifford Wolf	2013-11-21	1	-10/+27
*	Major improvements in mem2reg and added "init" sync rules	Clifford Wolf	2013-11-21	3	-0/+117
*	Fixed a bug in "add -global_input"	Clifford Wolf	2013-11-21	1	-16/+17
*	Added "proc_arst -global_arst" feature	Clifford Wolf	2013-11-20	2	-8/+81
*	Added "add" command (only wires for now)	Clifford Wolf	2013-11-20	2	-0/+155
*	Renamed temp module generated by "abc" pass from "logic" to "netlist"	Clifford Wolf	2013-11-19	2	-6/+6
*	Fixed abc pass blif parser for constant bits	Clifford Wolf	2013-11-13	1	-18/+57
*	Cleanups and bugfixes in response to new internal cell checker	Clifford Wolf	2013-11-11	2	-2/+3
*	Call internal checker more often	Clifford Wolf	2013-11-10	1	-0/+2
*	Improved user-friendliness of "sat" and "eval" expression parsing	Clifford Wolf	2013-11-09	2	-20/+16
*	Added verification of SAT model to "eval -vloghammer_report" command	Clifford Wolf	2013-11-09	1	-0/+43
*	Fixed keep attribute on wires in opt_clean	Clifford Wolf	2013-11-08	1	-1/+1
*	Renamed extend_un0() to extend_u0() and use it in genrtlil	Clifford Wolf	2013-11-07	1	-2/+2
*	Fixed type of sign extension in opt_const $eq/$ne handling	Clifford Wolf	2013-11-07	1	-9/+9
*	Fixed $eq/$ne bitwise optimization in opt_const	Clifford Wolf	2013-11-07	1	-7/+8
*	Added handling of unconnected/unspecified signals to eval -vloghammer_report	Clifford Wolf	2013-11-06	1	-2/+6
*	Added correct RTL undef handling to eval vloghammer mode	Clifford Wolf	2013-11-06	1	-3/+17
*	Added eval -vloghammer_report mode	Clifford Wolf	2013-11-06	1	-4/+142
*	Added support for "keep" attributes on wires	Clifford Wolf	2013-11-05	1	-0/+5
*	Merge branch 'master' of github.com:cliffordwolf/yosys	Clifford Wolf	2013-11-03	1	-0/+57
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\| *	Added resolution of positional arguments to hierarchy pass	Clifford Wolf	2013-11-03	1	-0/+57
* \|	Added placeholder check to dfflibmap and cleaned up some other placeholder ch...	Clifford Wolf	2013-10-31	2	-3/+3
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*	Added detection for endless recursion in fsm_detect pass	Clifford Wolf	2013-10-30	1	-4/+15
*	Fixed help message typo (memory pass)	Clifford Wolf	2013-10-30	1	-1/+1
*	Added -format option to splitnets	Clifford Wolf	2013-10-29	1	-1/+16
*	Added support for i/o buffers to iopadmap	Clifford Wolf	2013-10-26	1	-10/+35
*	Added support for sr flip-flops to dfflibmap	Clifford Wolf	2013-10-24	1	-3/+168
*	Added support for complex set-reset flip-flops in proc_dff	Clifford Wolf	2013-10-24	1	-4/+115
*	Fixed handling of boolean attributes (passes)	Clifford Wolf	2013-10-24	5	-7/+7
*	Improved handling of dff with async resets	Clifford Wolf	2013-10-21	1	-5/+60
*	Added handling of multiple async paths in proc_arst	Clifford Wolf	2013-10-19	2	-8/+21
*	Added dffsr support to proc_dff pass	Clifford Wolf	2013-10-18	1	-7/+72
*	Improved way of connecting ports in techmap pass	Clifford Wolf	2013-10-17	1	-18/+36
*	Only prefer connected signals iff they have public names	Clifford Wolf	2013-10-17	1	-5/+6
*	Fixed bug in synthesis of memories that are never written	Clifford Wolf	2013-10-17	1	-2/+7
*	Avoid re-arranging signals on register outputs	Clifford Wolf	2013-10-17	1	-3/+31
*	Fixed detection of major wires in opt_clean	Clifford Wolf	2013-10-17	1	-0/+3
*	Added iopadmap pass	Clifford Wolf	2013-10-16	3	-1/+161
*	Moved dfflibmap from passes/dfflibmap to passes/techmap	Clifford Wolf	2013-10-16	6	-11/+10