aboutsummaryrefslogtreecommitdiffstats
path: root/passes/proc
Commit message (Expand)AuthorAgeFilesLines
* Added "proc_mux -ifx"Clifford Wolf2016-06-062-19/+43
* Fix all undef-muxes in dlatch input coneClifford Wolf2016-06-021-34/+72
* Avoid creating undef-muxes when inferring latches in proc_dlatchClifford Wolf2016-06-011-0/+44
* Fixed proc_mux performance bugClifford Wolf2016-04-251-0/+3
* Fixed performance bug in proc_dlatchClifford Wolf2016-04-241-2/+61
* More flexible handling of initialization valuesClifford Wolf2016-04-221-7/+22
* Added "yosys -D" featureClifford Wolf2016-04-218-8/+8
* Preserve empty $pmux default casesClifford Wolf2016-03-311-2/+2
* Improved proc_mux performance for huge always blocksClifford Wolf2015-12-021-36/+153
* Re-created command-reference-manual.tex, copied some doc fixes to online helpClifford Wolf2015-08-141-1/+1
* Fixed trailing whitespacesClifford Wolf2015-07-028-23/+23
* Minor fixes in handling of "init" attributeClifford Wolf2015-04-091-0/+5
* Fixed compilation problems with gcc 4.6.3; use enum instead of const ints.Clifford Wolf2015-02-241-2/+4
* Added "proc_dlatch"Clifford Wolf2015-02-123-1/+311
* Removed SigSpec::extend_xx() apiClifford Wolf2015-01-011-1/+1
* Renamed extend() to extend_xx(), changed most users to extend_u0()Clifford Wolf2014-12-241-1/+1
* Added log_warning() APIClifford Wolf2014-11-091-2/+2
* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-102-2/+2
* namespace YosysClifford Wolf2014-09-277-22/+58
* Fixed handling of constant-true branches in proc_cleanClifford Wolf2014-08-122-2/+3
* More cleanups related to RTLIL::IdString usageClifford Wolf2014-08-021-1/+1
* Renamed port access function on RTLIL::Cell, added param access functionsClifford Wolf2014-07-313-81/+81
* Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespaceClifford Wolf2014-07-312-5/+5
* Using log_assert() instead of assert()Clifford Wolf2014-07-284-11/+8
* Using new obj iterator API in a few placesClifford Wolf2014-07-276-39/+44
* Refactoring: Renamed RTLIL::Design::modules to modules_Clifford Wolf2014-07-276-6/+6
* Refactoring: Renamed RTLIL::Module::cells to cells_Clifford Wolf2014-07-271-1/+1
* Refactoring: Renamed RTLIL::Module::wires to wires_Clifford Wolf2014-07-271-2/+2
* Changed a lot of code to the new RTLIL::Wire constructorsClifford Wolf2014-07-261-12/+3
* Manual fixes for new cell connections APIClifford Wolf2014-07-262-6/+13
* Changed users of cell->connections_ to the new API (sed command)Clifford Wolf2014-07-263-82/+82
* Renamed RTLIL::{Module,Cell}::connections to connections_Clifford Wolf2014-07-263-82/+82
* Use only module->addCell() and module->remove() to create and delete cellsClifford Wolf2014-07-252-66/+16
* Replaced more old SigChunk programming patternsClifford Wolf2014-07-242-11/+10
* Removed RTLIL::SigSpec::optimize()Clifford Wolf2014-07-232-6/+0
* Fixed all users of SigSpec::chunks_rw() and removed itClifford Wolf2014-07-231-5/+3
* Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3Clifford Wolf2014-07-231-2/+2
* Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3Clifford Wolf2014-07-231-2/+2
* Fixed memory corruption with new SigSpec API in proc_muxClifford Wolf2014-07-221-7/+3
* SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created...Clifford Wolf2014-07-221-1/+1
* SigSpec refactoring: using the accessor functions everywhereClifford Wolf2014-07-225-82/+82
* SigSpec refactoring: renamed chunks and width to __chunks and __widthClifford Wolf2014-07-225-82/+82
* Replaced depricated NEW_WIRE macro with module->addWire() callsClifford Wolf2014-07-211-10/+10
* Do not create $dffsr cells with no-op resets in proc_dffClifford Wolf2014-06-191-0/+5
* Added workaround for vhdl-style edge triggers from vhdl2verilog to proc_arstClifford Wolf2014-02-211-2/+6
* Tiny cleanup in proc_mux.ccClifford Wolf2014-01-031-3/+0
* Added support for non-const === and !== (for miter circuits)Clifford Wolf2013-12-271-2/+2
* Major improvements in mem2reg and added "init" sync rulesClifford Wolf2013-11-213-0/+117
* Added "proc_arst -global_arst" featureClifford Wolf2013-11-202-8/+81
* Added support for complex set-reset flip-flops in proc_dffClifford Wolf2013-10-241-4/+115