Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | OPMODE is port not param | Eddie Hung | 2019-09-20 | 1 | -7/+6 | |
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* | Do not run xilinx_dsp_cascadeAB for now | Eddie Hung | 2019-09-20 | 1 | -1/+2 | |
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* | WIP for xiinx_dsp_cascadeAB | Eddie Hung | 2019-09-20 | 1 | -3/+499 | |
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* | Run until convergence | Eddie Hung | 2019-09-20 | 1 | -3/+9 | |
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* | Cleanup ice40_dsp.pmg | Eddie Hung | 2019-09-20 | 1 | -12/+6 | |
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* | Cleanup xilinx_dsp | Eddie Hung | 2019-09-20 | 1 | -1/+1 | |
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* | More exceptions | Eddie Hung | 2019-09-20 | 1 | -2/+2 | |
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* | Update doc | Eddie Hung | 2019-09-20 | 1 | -2/+2 | |
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* | Add a xilinx_dsp_cascade matcher for PCIN -> PCOUT | Eddie Hung | 2019-09-20 | 4 | -54/+105 | |
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* | Add an overload for port/param with default value | Eddie Hung | 2019-09-20 | 1 | -0/+8 | |
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* | Small cleanup | Eddie Hung | 2019-09-20 | 1 | -19/+18 | |
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* | Disable support for SB_MAC16 reset since it is async | Eddie Hung | 2019-09-19 | 2 | -3/+7 | |
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* | SB_MAC16 ffCD to not pack same as ffO | Eddie Hung | 2019-09-19 | 1 | -2/+2 | |
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* | Clarify | Eddie Hung | 2019-09-19 | 1 | -1/+2 | |
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* | Update doc for ice40_dsp | Eddie Hung | 2019-09-19 | 1 | -1/+10 | |
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* | Add an index | Eddie Hung | 2019-09-19 | 2 | -0/+3 | |
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* | Fix width of D | Eddie Hung | 2019-09-19 | 1 | -1/+1 | |
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* | Use ID() macro | Eddie Hung | 2019-09-19 | 2 | -210/+210 | |
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* | Re-enable sign extension for C input | Eddie Hung | 2019-09-19 | 1 | -4/+4 | |
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* | Do not perform width-checks for DSP48E1 which is much more complicated | Eddie Hung | 2019-09-19 | 1 | -11/+0 | |
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* | Remove TODO as check should not be necessary | Eddie Hung | 2019-09-19 | 1 | -1/+0 | |
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* | Revert index to select | Eddie Hung | 2019-09-19 | 1 | -1/+1 | |
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* | Cleanup xilinx_dsp too | Eddie Hung | 2019-09-19 | 1 | -37/+28 | |
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* | Refactor ce{mux,pol} -> hold{mux,pol} | Eddie Hung | 2019-09-19 | 2 | -77/+77 | |
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* | Add HOLD/RST support for SB_MAC16 | Eddie Hung | 2019-09-19 | 2 | -69/+116 | |
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* | Add support for SB_MAC16 CD and H registers | Eddie Hung | 2019-09-19 | 2 | -13/+73 | |
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* | Refactor ice40_dsp.pmg | Eddie Hung | 2019-09-19 | 2 | -194/+426 | |
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* | Cleanup | Eddie Hung | 2019-09-19 | 1 | -8/+4 | |
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* | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-18 | 2 | -13/+18 | |
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| * | Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext | Eddie Hung | 2019-09-18 | 3 | -0/+115 | |
| |\ | | | | | | | peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells | |||||
| | * | Revert "Make one check $shift(x)? only; change testcase to be 8b" | Eddie Hung | 2019-09-13 | 1 | -3/+2 | |
| | | | | | | | | | | | | This reverts commit e2c2d784c8217e4bcf29fb6b156b6a8285036b80. | |||||
| | * | Tidy up | Eddie Hung | 2019-09-11 | 1 | -10/+16 | |
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| | * | Fix UB | Eddie Hung | 2019-09-11 | 1 | -2/+2 | |
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* | | | Add doc on pattern detector for overflow | Eddie Hung | 2019-09-18 | 1 | -0/+5 | |
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* | | | Check overflow condition is power of 2 without using int32 | Eddie Hung | 2019-09-18 | 2 | -5/+15 | |
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* | | | Add support for overflow using pattern detector | Eddie Hung | 2019-09-18 | 2 | -1/+31 | |
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* | | | Separate dffrstmux from dffcemux, fix typos | Eddie Hung | 2019-09-18 | 1 | -20/+32 | |
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* | | | Set more ports explicitly | Eddie Hung | 2019-09-12 | 1 | -0/+2 | |
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* | | | Add support for A1 and B1 registers | Eddie Hung | 2019-09-11 | 2 | -24/+105 | |
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* | | | Raise a RuntimeError instead of AssertionError | Eddie Hung | 2019-09-11 | 1 | -1/+2 | |
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* | | | Rename {A,B} -> {A2,B2} | Eddie Hung | 2019-09-11 | 2 | -33/+34 | |
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* | | | Fix UB | Eddie Hung | 2019-09-11 | 1 | -2/+2 | |
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* | | | Add PCOUT -> PCIN non-shifted cascading | Eddie Hung | 2019-09-11 | 1 | -15/+22 | |
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* | | | Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp | Eddie Hung | 2019-09-11 | 1 | -27/+45 | |
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| * | | Cope with presence of reset muxes too | Eddie Hung | 2019-09-11 | 1 | -4/+25 | |
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| * | | Cleanup | Eddie Hung | 2019-09-11 | 1 | -25/+22 | |
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| * | | Only display log message if did_something | Eddie Hung | 2019-09-11 | 1 | -1/+1 | |
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* | | | Make unextend a udata | Eddie Hung | 2019-09-11 | 1 | -3/+2 | |
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* | | | Input registers to add DSP as new siguser to block upstream packing | Eddie Hung | 2019-09-11 | 1 | -8/+16 | |
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* | | | More cleanup | Eddie Hung | 2019-09-11 | 1 | -62/+28 | |
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