| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Don't track , ... contradictions through x/z-bits | Clifford Wolf | 2017-08-25 | 1 | -1/+4 |
| * | Add removing of redundant pairs of bits in ==, ===, !=, and !== to opt_expr | Clifford Wolf | 2017-08-25 | 1 | -0/+72 |
| * | Mostly coding style related fixes in rmports pass | Clifford Wolf | 2017-08-15 | 1 | -30/+33 |
| * | rmports: Now remove ports from cell instances if we optimized them out of tha... | Andrew Zonenberg | 2017-08-14 | 1 | -2/+35 |
| * | ProcessModule is no longer virtual (why was it in the first place?) | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 |
| * | rmports now works on all modules in the design, not just the top. | Andrew Zonenberg | 2017-08-14 | 1 | -4/+7 |
| * | Updated Makefile to reflect opt_rmports being renamed to rmports | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 |
| * | Renamed opt_rmports pass to rmports | Andrew Zonenberg | 2017-08-14 | 1 | -5/+5 |
| * | Improved handling of constant connections in opt_rmports | Andrew Zonenberg | 2017-08-14 | 1 | -0/+2 |
| * | Fixed handling of cell ports that aren't wires | Andrew Zonenberg | 2017-08-14 | 1 | -0/+3 |
| * | opt_rmports: Fixed incorrect handling of multi-bit nets | Andrew Zonenberg | 2017-08-14 | 1 | -12/+27 |
| * | Removed commented out debug code | Andrew Zonenberg | 2017-08-14 | 1 | -4/+0 |
| * | Added opt_rmports pass (remove unconnected ports from top-level modules) | Andrew Zonenberg | 2017-08-14 | 2 | -0/+133 |
| * | Add support for set-reset cell variants to opt_rmdff | Clifford Wolf | 2017-08-09 | 1 | -0/+182 |
| * | Add handling of constant reset signals to opt_rmdff | Clifford Wolf | 2017-08-06 | 1 | -1/+23 |
| * | Add consolidation of init attributes to opt_clean, some opt_clean log fixes | Clifford Wolf | 2017-07-29 | 1 | -6/+82 |
| * | Add "opt_expr -fine" feature to remove neutral bits from reduce and logic ope... | Clifford Wolf | 2017-07-26 | 1 | -0/+47 |
| * | Excluded $_TBUF_ from opt_merge pass | Salvador E. Tropea | 2017-07-03 | 1 | -0/+1 |
| * | Fix and_or_buffer optimization in opt_expr for signed operators | Clifford Wolf | 2017-07-01 | 1 | -2/+2 |
| * | Add $tribuf to opt_merge blacklist | Clifford Wolf | 2017-06-30 | 1 | -0/+1 |
| * | Squelch trailing whitespace | Larry Doolittle | 2017-04-12 | 1 | -3/+3 |
| * | Disable opt_merge for $anyseq and $anyconst | Clifford Wolf | 2017-02-28 | 1 | -0/+3 |
| * | Add $live and $fair cell types, add support for s_eventually keyword | Clifford Wolf | 2017-02-25 | 1 | -1/+1 |
| * | Fixed some "used uninitialized" warnings in opt_expr | Clifford Wolf | 2017-02-11 | 1 | -1/+2 |
| * | Add optimization of (a && 1'b1) and (a || 1'b0) | Clifford Wolf | 2017-02-11 | 1 | -7/+22 |
| * | Fix issue #306, "Bug in opt -full" | C-Elegans | 2017-02-10 | 1 | -1/+19 |
| * | Fix handling of init attributes with strange width | Clifford Wolf | 2017-02-09 | 2 | -3/+9 |
| * | Add $cover cell type and SVA cover() support | Clifford Wolf | 2017-02-04 | 1 | -1/+1 |
| * | Fix indenting and log messages in code merged from opt_compare_pr | Clifford Wolf | 2017-01-31 | 1 | -102/+120 |
| * | Merge branch 'opt_compare_pr' of https://github.com/C-Elegans/yosys into C-El... | Clifford Wolf | 2017-01-31 | 1 | -1/+103 |
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| | * | Refactor and generalize the comparision optimization | C-Elegans | 2017-01-30 | 1 | -22/+42 |
| | * | Do not use b.as_int() in calculation of bit set | C-Elegans | 2017-01-21 | 1 | -8/+29 |
| | * | Optimize compares to powers of 2 | C-Elegans | 2017-01-16 | 4 | -81/+61 |
| | * | Fix issue #269, optimize signed compare with 0 | C-Elegans | 2017-01-15 | 3 | -0/+81 |
| * | | Improve opt_rmdff support for $dlatch cells | Clifford Wolf | 2017-01-31 | 1 | -4/+22 |
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| * | Added opt_rmdff support for $ff cells | Clifford Wolf | 2016-10-14 | 1 | -5/+13 |
| * | Added "opt_rmdff -keepdc" | Clifford Wolf | 2016-09-30 | 2 | -7/+20 |
| * | Improved init spec handling in opt_rmdff, modernized the code a bit | Clifford Wolf | 2016-08-30 | 1 | -39/+82 |
| * | Removed $predict again | Clifford Wolf | 2016-08-28 | 1 | -1/+1 |
| * | Added "wreduce -memx" | Clifford Wolf | 2016-08-20 | 1 | -3/+14 |
| * | Optimize memory address port width in wreduce and memory_collect, not verilog... | Clifford Wolf | 2016-08-19 | 1 | -0/+18 |
| * | After reading the SV spec, using non-standard predict() instead of expect() | Clifford Wolf | 2016-07-21 | 1 | -1/+1 |
| * | Added basic support for $expect cells | Clifford Wolf | 2016-07-13 | 1 | -1/+1 |
| * | Added opt_expr support for div/mod by power-of-two | Clifford Wolf | 2016-05-29 | 1 | -0/+69 |
| * | Connections between inputs and inouts are driven by the input | Clifford Wolf | 2016-04-26 | 1 | -0/+3 |
| * | Added "yosys -D" feature | Clifford Wolf | 2016-04-21 | 9 | -12/+12 |
| * | Fixed performance bug in "share" pass | Clifford Wolf | 2016-04-21 | 1 | -2/+51 |
| * | Improvements in opt_expr | Clifford Wolf | 2016-04-21 | 1 | -12/+62 |
| * | Improved opt_merge support for $pmux cells | Clifford Wolf | 2016-03-31 | 1 | -4/+46 |
| * | Typo fixes in opt_expr and opt_merge | Clifford Wolf | 2016-03-31 | 2 | -2/+2 |
