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author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-11 15:07:27 -0700 |
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committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-14 10:28:11 -0700 |
commit | 3dd7f42e2b07c84178c648a0c3979c61fe25f68f (patch) | |
tree | 940693ff6899ba5e6f03d80b2777b38b19ffdc96 /passes/opt | |
parent | 66aac06eeef177318f3a4ade150e20a21be7e7c7 (diff) | |
download | yosys-3dd7f42e2b07c84178c648a0c3979c61fe25f68f.tar.gz yosys-3dd7f42e2b07c84178c648a0c3979c61fe25f68f.tar.bz2 yosys-3dd7f42e2b07c84178c648a0c3979c61fe25f68f.zip |
opt_rmports: Fixed incorrect handling of multi-bit nets
Diffstat (limited to 'passes/opt')
-rw-r--r-- | passes/opt/opt_rmports.cc | 39 |
1 files changed, 27 insertions, 12 deletions
diff --git a/passes/opt/opt_rmports.cc b/passes/opt/opt_rmports.cc index 6c80e2b7c..afbbecf84 100644 --- a/passes/opt/opt_rmports.cc +++ b/passes/opt/opt_rmports.cc @@ -56,14 +56,28 @@ struct OptRmportsPass : public Pass { auto& conns = module->connections(); for(auto sigsig : conns) { - auto s1 = sigsig.first.as_wire(); - auto s2 = sigsig.second.as_wire(); + auto s1 = sigsig.first; + auto s2 = sigsig.second; - if( (s1->port_input || s1->port_output) && (used_ports.find(s1->name) == used_ports.end()) ) - used_ports.emplace(s1->name); + int len1 = s1.size(); + int len2 = s2.size(); + int len = len1; + if(len2 < len1) + len = len2; - if( (s2->port_input || s2->port_output) && (used_ports.find(s2->name) == used_ports.end()) ) - used_ports.emplace(s2->name); + for(int i=0; i<len; i++) + { + auto w1 = s1[i].wire; + auto w2 = s2[i].wire; + + //log(" conn %s, %s\n", w1->name.c_str(), w2->name.c_str()); + + if( (w1->port_input || w1->port_output) && (used_ports.find(w1->name) == used_ports.end()) ) + used_ports.emplace(w1->name); + + if( (w2->port_input || w2->port_output) && (used_ports.find(w2->name) == used_ports.end()) ) + used_ports.emplace(w2->name); + } } //Then check connections to cells @@ -73,12 +87,13 @@ struct OptRmportsPass : public Pass { auto& cconns = cell->connections(); for(auto conn : cconns) { - if(!conn.second.is_wire()) - continue; - auto sig = conn.second.as_wire(); - - if( (sig->port_input || sig->port_output) && (used_ports.find(sig->name) == used_ports.end()) ) - used_ports.emplace(sig->name); + for(int i=0; i<conn.second.size(); i++) + { + auto sig = conn.second[i].wire; + //log(" sig %s\n", sig->name.c_str()); + if( (sig->port_input || sig->port_output) && (used_ports.find(sig->name) == used_ports.end()) ) + used_ports.emplace(sig->name); + } } } |