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* Do not collect disabled $memwr cellsClifford Wolf2015-07-061-15/+18
* Fixed trailing whitespacesClifford Wolf2015-07-027-21/+21
* Modernized memory_dff (and fixed a bug)Clifford Wolf2015-06-142-151/+166
* Added "memory -nordff"Clifford Wolf2015-06-141-2/+9
* Merge clock inverters in memory_dffClifford Wolf2015-06-091-16/+37
* Fixed memory_unpack for initialized memoriesClifford Wolf2015-04-291-0/+17
* Fixed memory_share for unconditional write with part select to memoryClifford Wolf2015-04-221-0/+3
* Added memory_bram "make_outreg" featureClifford Wolf2015-04-091-2/+25
* Added support for "file names with blanks"Clifford Wolf2015-04-081-3/+1
* Added support for initialized bramsClifford Wolf2015-04-061-8/+35
* Avoid parameter values with size 0 ($mem cells)Clifford Wolf2015-04-052-6/+11
* Replaced ezDefaultSAT with ezSatPtrClifford Wolf2015-02-211-7/+7
* Various fixes for memories with offsetsClifford Wolf2015-02-142-5/+17
* Added $meminit support to "memory" commandClifford Wolf2015-02-143-30/+69
* Added onehot attributeClifford Wolf2015-02-041-0/+13
* Fixed typos found by lintianRuben Undheim2015-02-011-2/+2
* Refactoring of memory_bram and xilinx bramsClifford Wolf2015-01-181-204/+407
* memory_bram hotfix for memories with width 1Clifford Wolf2015-01-061-3/+3
* removed old debug codeClifford Wolf2015-01-061-1/+0
* Towards Xilinx bram supportClifford Wolf2015-01-061-1/+0
* Towards Xilinx bram supportClifford Wolf2015-01-061-1/+1
* Towards Xilinx bram supportClifford Wolf2015-01-051-0/+3
* Towards Xilinx bram supportClifford Wolf2015-01-041-3/+4
* Added memory_bram "shuffle_enable" featureClifford Wolf2015-01-041-1/+113
* Removed left over debug code from memory_bramClifford Wolf2015-01-041-2/+2
* Added "memory -bram"Clifford Wolf2015-01-031-2/+11
* Added memory_bram 'or_next_if_better' featureClifford Wolf2015-01-031-42/+156
* memory_bram transp supportClifford Wolf2015-01-031-4/+22
* Progress in memory_bramClifford Wolf2015-01-031-11/+5
* Added proper clkpol support to memory_bramClifford Wolf2015-01-021-4/+32
* Progress in memory_bramClifford Wolf2015-01-021-3/+6
* Progress in memory_bramClifford Wolf2015-01-021-1/+10
* Progress in memory_bramClifford Wolf2015-01-011-22/+207
* Progress in memory_bramClifford Wolf2015-01-011-37/+145
* Progress in memory_bramClifford Wolf2014-12-311-7/+115
* Added memory_bram (not functional yet)Clifford Wolf2014-12-312-0/+286
* More dict/pool related changesClifford Wolf2014-12-271-2/+2
* Renamed extend() to extend_xx(), changed most users to extend_u0()Clifford Wolf2014-12-241-12/+12
* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-101-5/+5
* namespace YosysClifford Wolf2014-09-276-12/+32
* Fixed $memwr/$memrd order in memory_dffClifford Wolf2014-09-161-4/+6
* Corrected spelling mistakes found by lintianRuben Undheim2014-09-061-1/+1
* Improved write address decoder generation memory_mapClifford Wolf2014-08-301-16/+28
* Using worker class in memory_mapClifford Wolf2014-08-301-226/+231
* Various improvements in memory_dff passClifford Wolf2014-08-061-21/+22
* No implicit conversion from IdString to anything elseClifford Wolf2014-08-021-1/+1
* More cleanups related to RTLIL::IdString usageClifford Wolf2014-08-023-9/+9
* Added ModIndex helper class, some changes to RTLIL::MonitorClifford Wolf2014-08-011-3/+2
* Renamed modwalker.h to modtools.hClifford Wolf2014-07-311-5/+6
* Renamed port access function on RTLIL::Cell, added param access functionsClifford Wolf2014-07-315-128/+128
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