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Author
Age
Files
Lines
*
Intersynth URL
Claire Xenia Wolf
2021-06-09
1
-1
/
+1
*
More deadname stuff
Claire Xenia Wolf
2021-06-09
9
-26
/
+26
*
Use HTTPS for website links, gatecat email
Claire Xenia Wolf
2021-06-09
9
-12
/
+12
*
Fixing old e-mail addresses and deadnames
Claire Xenia Wolf
2021-06-08
10
-13
/
+13
*
split CodingReadme into multiple files
N. Engelhardt
2021-03-22
1
-5
/
+6
*
bugpoint: add runner option
Zachary Snow
2021-03-17
1
-0
/
+3
*
verilog: Use proc memory writes in the frontend.
Marcelina Kościelnicka
2021-03-08
1
-0
/
+5
*
Add support for memory writes in processes.
Marcelina Kościelnicka
2021-03-08
1
-2
/
+3
*
Update command-reference-manual.tex
Claire Xen
2021-03-04
1
-4
/
+4
*
RTLIL Documentation: switch in process is optional
Robert Baruch
2021-02-27
1
-1
/
+1
*
Further juggles the wording of "character".
Robert Baruch
2020-11-25
1
-1
/
+1
*
Clarifies how character encodings work.
Robert Baruch
2020-11-25
1
-5
/
+5
*
Clarifies whitespace and eol.
Robert Baruch
2020-11-25
1
-2
/
+6
*
Cleans up doublequotes
Robert Baruch
2020-11-25
1
-2
/
+2
*
Clarifies use of integers, and character set.
Robert Baruch
2020-11-25
1
-4
/
+12
*
Clarifies processes, corrects some attributes
Robert Baruch
2020-11-25
1
-29
/
+46
*
Refactors for attributes.
Robert Baruch
2020-11-24
1
-50
/
+50
*
Cleans up some descriptions and syntax
Robert Baruch
2020-11-24
1
-25
/
+43
*
Adds missing "end" and eol to module.
Robert Baruch
2020-11-22
1
-1
/
+1
*
Update to Values #2
Robert Baruch
2020-11-22
1
-1
/
+1
*
Update to Values section
Robert Baruch
2020-11-22
1
-2
/
+2
*
Adds appendix on RTLIL text format
Robert Baruch
2020-11-22
3
-0
/
+260
*
manual: fix typo.
whitequark
2020-08-27
1
-1
/
+1
*
Replace "ILANG" with "RTLIL" everywhere.
whitequark
2020-08-26
3
-16
/
+14
*
Add latches to the manual.
Marcelina Kościelnicka
2020-06-26
1
-42
/
+165
*
Add a few more gate types to the manual.
Marcelina Kościelnicka
2020-06-26
1
-8
/
+36
*
Add new builtin FF types
Marcelina Kościelnicka
2020-06-23
1
-28
/
+178
*
Use C++11 final/override keywords.
whitequark
2020-06-18
2
-4
/
+4
*
flatten: preserve original object names via hdlname attribute.
whitequark
2020-06-08
1
-0
/
+7
*
Use in-tree include directory in manual build
Xiretza
2020-05-30
1
-1
/
+4
*
Merge pull request #1885 from Xiretza/mod-rem-cells
clairexen
2020-05-29
2
-1
/
+24
|
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*
Document division and modulo cells
Xiretza
2020-05-28
1
-0
/
+23
|
*
Add flooring division operator
Xiretza
2020-05-28
1
-1
/
+1
|
*
Add flooring modulo operator
Xiretza
2020-05-28
1
-1
/
+1
*
|
Restrict RTLIL::IdString to not contain whitespace or control chars.
whitequark
2020-05-29
1
-3
/
+6
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/
*
Update CHANGELOG and manual for departure from upstream
Eddie Hung
2020-04-27
1
-2
/
+3
*
Get rid of dffsr2dff.
Marcelina Kościelnicka
2020-04-15
1
-198
/
+2300
*
fix typo in `write_smt2` help
Teguh Hofstee
2020-03-23
1
-1
/
+1
*
manual: explain RTLIL::Wire::{upto,offset}.
whitequark
2020-02-09
1
-0
/
+7
*
Merge pull request #1553 from whitequark/manual-dffx
Claire Wolf
2020-01-28
1
-11
/
+90
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*
manual: document $dffe, $dffsr, $_DFFE_*, $_DFFSR_* cells.
whitequark
2019-12-05
1
-11
/
+90
*
|
Merge pull request #1575 from rodrigomelo9/master
Eddie Hung
2019-12-15
1
-2
/
+2
|
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*
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Fixed some missing "verilog_" in documentation
Rodrigo Alejandro Melo
2019-12-13
1
-2
/
+2
*
|
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Merge pull request #1577 from gromero/for-yosys
Eddie Hung
2019-12-15
1
-1
/
+1
|
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manual: Fix text in Abstract section
Gustavo Romero
2019-12-11
1
-1
/
+1
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/
*
/
manual: document behavior of many comb cells more precisely.
whitequark
2019-12-04
1
-35
/
+56
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/
*
Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs
Clifford Wolf
2019-08-06
1
-1
/
+1
*
manual: explain the purpose of `sync always`.
whitequark
2019-07-02
1
-2
/
+3
*
Explain exact semantics of switch and case rules in the manual.
whitequark
2019-06-19
1
-0
/
+12
*
Add $specrule cells for $setup/$hold/$skew specify rules
Clifford Wolf
2019-04-23
1
-1
/
+1
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